Wafter level vacuum packaging method
A vacuum packaging, wafer-level technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of unsealable holes 721, limited thickness, and increased packaging costs
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[0023] (common part)
[0024] Base 6 Microstructure 61
[0025] Cover 62 Notch 621
[0026] Space 63 Wafer 7
[0027] Microstructure 71 Covering 72
[0028] Hole 721 Space 73
[0029] encapsulation layer 74
[0030] (invention part)
[0031] Package Structure Process 1 Package Structure 1A, 1B
[0032] Substrate 11, 11B Through hole 111, 111B
[0033] Cover 12, 12B etch protection layer 112, 121
[0034] Etched areas 113, 122 Microstructure elements 13, 13B
[0035] Inner line 14, 14B Space 15, 15B
[0036] Bottom surface 151 Through holes 16, 16B
[0037] Packaging process 2 Packaging material 21
[0038] Ripening process 3 Ripening device 31
[0039] Cutting process 4 Vacuum coating device 5
[0040] Chamber 51 Vacuum pump 52
[0041] Rotary Platform 53 Motor 54
[0042] Encapsulating material spout 55 Encapsulating material conveying pipe 56
[0043] Control Platform 57
[0044] Please refer to FIG. 1 to FIG. 3 , which show the structure of the selec...
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