Lock detecting circuit and method for phase lock loop system

Abstract

This invention relates to a locking detection circuit and a method for phase-locking loop system including a delay unit and an established logic unit, in which, the delay unit inputs phase error signals of the system to generate a current phase error signal and generate at least one delay phase error signal based on it, the established logic unit generates and sets up an un-locked instruction signal based on the current phase error signal and the delayed phase error signal, if said un-locked instruction signal is not established in a specific number of the pulse time, then a loop lock instruction signal is generated, which can adjust the tolerance to the error of static phase difference flexibly.

Description

technical field [0001] The present invention relates to a circuit state detection circuit and method, in particular to a lock detecting circuit and method for a phase lock loop (PLL) system. Background technique [0002] figure 1 A system block diagram showing a typical PLL system 100 in the prior art, which includes a pre-divider (pre-divider) 110, a phase frequency detector (phase frequency detector or PFD) 120, a charge pump (charge pump) 130, Low pass filter (low pass filter) 140 , voltage controlled oscillator (voltage controlled oscillator or VCO) 150 , post-divider (post-divider) 160 and feedback divider (feedback divider) 170 . The prescaler 110 receives the input clock signal P IN , and output a frequency-divided reference clock signal RCLK to the phase frequency detector 120 . The phase frequency detector 120 is connected to the feedback divider 170 to receive the frequency-divided clock signal VCLK of the voltage-controlled oscillation. The phase frequency det...

AI Technical Summary

Problems solved by technology

[0007] like Figure 2A The traditional lock detection circuit 200 shown in the figure is often caused by component matching problems, process variations or temperature changes, even though the relative PLL system 100 is locked, but the lock detection circuit 200 still detects non-negligible static phase difference

In other words, the phase error tolerance of the conventional lock detection circuit 200 often does not meet the actual requirements

And if Figure 2A The phase error tolerance of the traditional lock detection circuit 200 shown cannot be flexibly changed. This shortcoming makes it impossible for the traditional lock detection circuit 200 to adjust the applicable phase error tolerance according to actual needs to meet the needs of different applications.

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