Memory module, memory system and method for controlling thereof
A technology of memory controller and memory system, applied in the field of memory system, can solve the problem that the performance of high-speed DRAM device cannot be utilized, etc.
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[0035] FIG. 3 is a block diagram illustrating a memory system according to an exemplary embodiment of the present invention.
[0036]Referring to FIG. 3 , the memory system includes a memory controller 100 and a memory module 200 . The memory controller 100 is connected to the memory module 200 through four bus channels CH0, CH1, CH2 and CH3. Each bus channel includes an n-bit download bus DLB and two m-bit upload buses PULB and SULB. An m-bit upload bus PULB is an upload bus for the main memory pack, and another m-bit upload bus SULB is an upload bus for the sub memory pack. The memory controller 100 provides a plurality of reference clock signals FCLK to the memory module 200 . Memory controller 100 includes some physically readable media, such as read only memory (ROM), static random access memory (SRAM), flash memory, etc., and includes program code to be written to and read from the media. For each channel, the memory module 200 includes a main memory component 210 and...
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