Architecture and algorithms for data compression

Abstract

A system architecture conserves memory bandwidth by including compression utility to process data transfers from the cache into external memory. The cache decompresses transfers from external memory and transfers full format data to naive clients that lack decompression capability and directly transfers compressed data to savvy clients that include decompression capability. An improved compression algorithm includes software that computes the difference between the current data word and each of a number of prior data words. Software selects the prior data word with the smallest difference as the nearest match and encodes the bit width of the difference to this data word. Software then encodes the difference between the current stride and the closest previous stride. Software combines the stride, bit width, and difference to yield final encoded data word. Software may encode the stride of one data word as a value relative to the stride of a previous data word.

Description

BACKGROUND OF THE INVENTIONField of the Invention[0001]Embodiments of the present invention relate generally to graphics processing and, more specifically, to architecture and algorithms for data compression.Description of the Related Art[0002]In computer systems, in general, and in graphics processing units (GPUs), in particular, evolving technology affords manufacturers the ability to produce processors with increasing density that process data with increasing speed and efficiency. Higher data rates associated with streaming video, among other types of data transmission, magnify the importance of conserving memory bandwidth. Accordingly, efforts to reduce the memory bandwidth utilization are increasingly important.[0003]However, present technology has advanced in the areas of processor speed and efficiency at a faster rate than corresponding advances in memory access technology. Consequently, transfers between on-chip processors and external memory may present a bottleneck that li...

AI Technical Summary

Benefits of technology

The patent describes a way to make computer graphics processing units (GPUs) more efficient by adding compression capabilities to certain parts of the GPU. This allows for better compression of data transfers between the GPU and the main computer memory, saving bandwidth and reducing internal data transfer requests. Overall, this approach results in improved performance and efficiency for graphics processing.

Problems solved by technology

Consequently, transfers between on-chip processors and external memory may present a bottleneck that limits the overall system speed and efficiency.

Adding more memory circuits corresponding to the increase in memory transfers may improve memory capacity, but adding more memory circuits incurs increased cost and increased use of valuable board area.

The cache is typically limited in capacity, and so the GPU frequently executes transfers to and from a main memory, such as a system memory.

In sum, present architectures implement compression with only about forty percent of memory transfers, while the remaining memory transfers impose a burden on memory bandwidth usage.

Further, as memory transfers are likely to increase with developing processor technology, the memory bandwidth usage may be expected to also increase, resulting in an increase in the bottleneck that further would further limit processing efficiency.

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