Dynamic random access memory cell and fabricating method thereof

Abstract

A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep trench. Thereafter, a trench is formed in the substrate on one side of the deep trench capacitor. The trench exposes a portion of the upper electrode of the deep trench capacitor and a portion of the substrate. After that, a semiconductor strip is formed in the trench. A gate dielectric layer is formed over the substrate to cover the exposed semiconductor strip and the substrate. A gate is formed over the gate dielectric layer such that the gate and the semiconductor strip crosses over each other, and the gate-covered portion of the semiconductor strip serves as a channel region.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application claims the priority benefit of Taiwan application serial no. 931223996, filed Aug. 11, 2004. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a memory device and fabricating method thereof. More particularly, the present invention relates to a dynamic random access memory cell and fabricating method thereof. [0004] 2. Description of the Related Art [0005] With each new generation of microprocessor functionally more powerful, the type of software programs that can be operated on is getting bigger and bigger. As a result, memory with an ever-increasing storage capacity and a faster access speed is demanded. Due to the increasing importance of memory storage capacity and operation speed, innovative technique for fabricating memory devices is always a major research target in the semiconductor industry. [0006] In general, memory types can be categorized according to the sto...

AI Technical Summary

Benefits of technology

"The present invention provides a method of fabricating a dynamic random access memory (DRAM) cell that can resolve the problem of too large or too small a buried strap window. The method involves depositing a patterned mask layer on a substrate, creating a deep trench capacitor with a lower electrode, capacitor dielectric layer, and collar oxide layer, and depositing a semiconductor material into the deep trench to form a semiconductor strip. A conductive material is then deposited to form a first conductive layer. A trench is formed on one side of the deep trench capacitor to expose a portion of the substrate. A gate dielectric layer is formed over the substrate to cover the exposed semiconductor material. A second conductive material is then deposited to form a second conductive layer over the gate dielectric layer. The semiconductor material layer is patterned to form a semiconductor strip, which serves as a channel region. The DRAM cell also includes an active device with a semiconductor strip, a gate dielectric layer, and a gate. The semiconductor strip is adjacent to the deep trench capacitor and does not require a buried strap for electrically connecting with the active device. This solves the problem of too large or too small a buried strap window."

Problems solved by technology

However, more and more problems are still encountered in the process of fabricating the deep trench capacitor DRAM as the size of each device is reduced.

For example, if the buried strap window is too large, leakage current will be a significant problem for the device.

On the other hand, if the buried strap window is too small, the resistance between the buried strap and the upper electrode may be too high leading to a significant drop in the performance of the device.

Therefore, the size of the buried strap window has become one of the critical factors affecting the performance of DRAM devices.

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