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Semiconductor device with interface circuit and method of configuring semiconductor devices

a technology of interface circuit and semiconductor device, which is applied in the direction of semiconductor device, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problems of increasing device complexity, and achieve the effect of increasing device complexity and increasing signal density

Inactive Publication Date: 2006-12-21
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes methods and devices for improving semiconductor devices by arranging critical features in parallel, reducing process-induced variation. This parallel arrangement can be applied to the layout of semiconductor devices, patterning devices, and even circuit cells within the semiconductor device. The technical effects of this invention include reduced yield loss for semiconductor devices, increased device complexity, and increased signal density.

Problems solved by technology

Thus, the improved I / O cell configuration may allow increased device complexity and may also provide increased signal density.

Method used

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  • Semiconductor device with interface circuit and method of configuring semiconductor devices
  • Semiconductor device with interface circuit and method of configuring semiconductor devices
  • Semiconductor device with interface circuit and method of configuring semiconductor devices

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Embodiment Construction

[0021] The invention and the various features and advantageous details thereof are explained more fully with reference to the nonlimiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well known starting materials, processing techniques, components and equipment are omitted so as not to unnecessarily obscure the invention in detail. It should be understood, however, that the detailed description and the specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only and not by way of limitation. After reading the specification, various substitutions, modifications, additions and rearrangements will become apparent to those skilled in the art from this disclosure which do not depart from the scope of the appended claims.

[0022] Embodiments of the present invention provide semiconductors with device features (e.g., I / O gates or core gates) laid out in parallel. ...

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Abstract

Methods and devices yielding an improved semiconductor device with interface circuit are disclosed. Configuring a semiconductor with parallel device features reduces process variation (e.g., lithographically-induced process variation or other defects). Embodiments of the present invention provide semiconductor devices with I / O cell device features (e.g., I / O gates or core gates) laid out in parallel. Additionally, embodiments of the present invention can allow patterning devices to be made to more exacting tolerances because some patterning devices may have a higher capability along one axis than another. Embodiments of the present invention also include a semiconductor device having like-functioned I / O cells arranged such that their layouts and rotational orientations with respect to their corresponding core remain constant. Furthermore, disclosed semiconductor devices may include at least one circuit cell having non-parallel features, where the circuit cell is arranged either within the core or within a corresponding interface circuit cell.

Description

TECHNICAL FIELD OF THE INVENTION [0001] The invention relates in general to methods and devices for semiconductors. More specifically, it relates to configuration of semiconductor devices having Input / Output (I / O) interface circuits. BACKGROUND OF THE INVENTION [0002] The demand for faster and smaller microelectronic devices is driving continual shrinks of microelectronic architectures. Such microelectronic architectures form the electronic circuits of semiconductor devices. Semiconductor devices are manufactured on silicon wafers using a process of adding layers and selectively removing parts of the layers. The wafers are cut into individual dies upon the completion of the manufacturing process. Each individual die includes a semiconductor device having a core area, where logical computations are made. [0003] Individual dies are not typically directly integrated into electronic devices, such as, for example, cel phones. Thus, semiconductor devices typically include at least one I / O...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/336
CPCH01L27/0203Y02P80/30
Inventor HOSOMI, EIICHI
Owner KK TOSHIBA