Unlock instant, AI-driven research and patent intelligence for your innovation.

Non-volatile memory device and manufacturing method thereof

a memory device and non-volatile technology, applied in the direction of semiconductor devices, basic electric elements, electrical appliances, etc., can solve the problems of limiting the implementation of low-voltage and high-speed operations, limiting the level of integration, etc., and achieve the effect of preventing interference between charges on both sides and reducing cell siz

Inactive Publication Date: 2008-01-03
SK HYNIX INC
View PDF5 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention provides a non-volatile memory device with a SONOS structure that prevents interference between charges and reduces cell size. A charge trap layer is physically separated to prevent charges from being moved mutually. The method of manufacturing includes depositing layers, etching, and forming a recessed pattern of a buffer layer to form a charge trap layer. The technical effects are improved performance and reliability of the non-volatile memory device.

Problems solved by technology

There is a limit to the implementation of a low-voltage and high-speed operation.
If the density of charges is increased in order to implement a multi-level, the interference phenomenon becomes more profound, which leads to limit the level of integration.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Non-volatile memory device and manufacturing method thereof
  • Non-volatile memory device and manufacturing method thereof
  • Non-volatile memory device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0016]Hereinafter, specific embodiments of the invention will be described with reference to the accompanying drawings.

[0017]FIGS. 2 to 5 are cross-sectional views illustrating a method of manufacturing a non-volatile memory device having a SONOS structure according to an embodiment of the invention.

[0018]Referring to FIG. 2, a gate insulating layer 101, a buffer layer 102, a blocking oxide layer 103 and a gate electrode 104 are sequentially formed on a semiconductor substrate 100. The buffer layer 102 may be formed using a silicon oxide layer or a silicon nitride layer. The blocking oxide layer 103 may be formed using a high dielectric layer, such as Al2O3, HfO2, Ta2O5, ZrO2, La2O3 or TiO2, or a combination of them. Furthermore, a silicon oxide layer may be used instead of the blocking oxide layer 103. The gate electrode 104 may be formed using polysilicon doped with an impurity. The gate electrode 104 may be formed using transfer metal nitride such as TiN, TaN, TiCN, TaCN, TiSiN, ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically in a horizontal direction, and a method of manufacturing the same. The charge trap layer that traps electric charges toward the source and the drain is physically divided. It can fundamentally prevent the charges at both sides from being moved mutually. It is therefore possible to prevent interference between charges at both sides although the cell size is reduced.

Description

BACKGROUND OF THE INVENTION[0001]The invention relates, in general, to non-volatile memory devices and, more particularly, to a non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically horizontally and a method of manufacturing the same.[0002]In recent years, Non-volatile Semiconductor Memories (NVSM) are largely classified into floating gate series and Metal Insulator Semiconductor (MIS) series in which two or more kinds of dielectric layers are laminated doubly or triply in terms of the process technology.[0003]The floating gate series implement a memory characteristic by employing the potential well. A representative example of the floating gate series is an EPROM Tunnel Oxide (ETO) structure that has been widely used as flash Electrically Erasable Programmable Read Only Memory (EEPROM). The MIS series performs the memory function employing traps existing at the dielectric layer bulk, ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/336H10B69/00
CPCH01L21/28282H01L29/513H01L29/512H01L29/40117H01L29/42324H01L29/66833
Inventor CHOI, EUN SEOK
Owner SK HYNIX INC