Method for forming plating layer of printed circuit board

Abstract

Disclosed herein is a method for forming a plating layer of a printed circuit board. A deviation in plating thickness of a copper plating layer filled in a circuit pattern part and a through-hole part in a SIP product group having a narrow through-hole pitch and a large through-hole volume may be reduced. To this end, there is provided a method for forming a plating layer of a printed circuit board, the method including: processing a though-hole in a copper clad lamination (CCL); forming a seed plating layer in the through hole; applying a resist on the CCL and the seed plating layer and exposing and developing the resist; forming a primary plating layer on the seed plating layer; forming a copper plating layer on the primary plating layer; and removing the resist remaining on the primary plating layer and the seed plating layer to thereby form patterns.

Description

CROSS REFERENCE(S) TO RELATED APPLICATIONS[0001]This application claims the benefit under 35 U.S.C. Section 119 of Korean Patent Application Serial No. 10-2010-0087125, entitled “Method For Forming Plating Layer Of Printed Circuit Board” filed on Sep. 6, 2010, which is hereby incorporated by reference in its entirety into this application.BACKGROUND OF THE INVENTION[0002]1. Technical Field[0003]The present invention relates to a method for forming a plating layer of a printed circuit board, and more particularly, to a method for forming a plating layer of a printed circuit board in which a copper plating layer having a uniform thickness is formed in a circuit pattern part and a through-hole part of a substrate.[0004]2. Description of the Related Art[0005]In accordance with the trend toward a small-sized and multi-function electronic device, a printed circuit board having various functions has been demanded. Particularly, in the case of a system-in-package (SIP), excellent thermal an...

AI Technical Summary

Benefits of technology

[0009]An object of the present invention is to provide a method capable of overcoming a difference in plating thickness and more stably performing plating by sequentially performing primary plating and secondary plating at the time of manufacturing of a printed circuit board.

[0010]According to an exemplary embodiment of the present invention, there is provided a method for forming a plating layer of a printed circuit board, the method including: processing a though-hole in a copper clad lamination (CCL); forming a seed plating layer in the through hole; applying a resist on the CCL and the seed plating layer and exposing and developing the resist; forming a primary plating layer on the seed plating layer; forming a copper plating layer on the primary plating layer; and removing the resist remaining on the primary plating layer and the seed plating layer to thereby form patterns.

Problems solved by technology

However, in the case filling-plating of the through-hole for the SIP, there are many plating limitations due to restrictions such a narrow pitch, a wide hole size, and the like.

Particularly, since the plating needs to be performed at a high current density in order to fill the wide through-hole, a deviation in plating thickness between a circuit pattern part and a through-hole is increased, such that uniformity of the plating thickness is not satisfied.

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