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Formation of Field Effect Transistor Devices

a field effect transistor and transistor technology, applied in the direction of semiconductor devices, basic electric elements, electrical equipment, etc., can solve the problems of degrading the ability of photolithography to resolve 2-dimensional patterns, and the space between line ends tends to grow larger and larger

Inactive Publication Date: 2012-12-06
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as gate pitch shrinks, the ability of photolithography to resolve 2-dimensional patterns is degraded.
During the course of the device fabrication, the space between line ends tends to undesirably grow larger due to processes such as dry or wet etches that erode short edges faster than long edges.

Method used

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  • Formation of Field Effect Transistor Devices
  • Formation of Field Effect Transistor Devices
  • Formation of Field Effect Transistor Devices

Examples

Experimental program
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Embodiment Construction

[0020]Replacement gate is a flow for manufacturing semiconductor field effect transistors. There exist a multitude of variations of replacement gate flows, but they usually involve the formation of a dummy gate which is used as a place holder to define the location of where the final gate will eventually be formed. Source and drain junctions are defined using any combination of processes which can be self-aligned to the dummy gate, including, for example, spacer formation, ion implantation, impurity diffusion, epitaxial growth, and silicide formation. Then, with the source and drain in place high thermal budget steps such as dopant activation, epitaxial precleans and growths, etc. can be performed before the final gate material is put in place. At some point during the flow, a gap-fill dielectric is deposited, and the surface of the structures is planarized so that the tops of the dummy gates are exposed. The dummy gate is removed, leaving trenches inside the dielectric. At some poi...

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Abstract

A method includes defining active regions on a substrate, forming a dummy gate stack material over exposed portions of the active regions of the substrate and non-active regions of the substrate, removing portions of the dummy gate stack material to expose portions of the active regions and non-active regions of the substrate and define dummy gate stacks, forming a gap-fill dielectric material over the exposed portions of the substrate and the source and drain regions, removing portions of the gap-fill dielectric material to expose the dummy gate stacks, removing the dummy gate stacks to form dummy gate trenches, forming dividers within the dummy gate trenches, depositing gate stack material inside the dummy gate trenches, over the dividers, and the gap-fill dielectric material, and removing portions of the gate stack material to define gate stacks.

Description

FIELD[0001]The present invention relates to semiconductor field effect transistor device fabrication.DESCRIPTION OF RELATED ART[0002]In order to increase layout density, especially in high-density features such as static random access memory (SRAM), crisp patterning of gate line-ends has become more desirable. However, as gate pitch shrinks, the ability of photolithography to resolve 2-dimensional patterns is degraded. One solution is to use two patterning steps. The first patterning step is used define lines at the critical gate pitch, allowing features with small end-to-end spacing to merge into continuous lines. The second patterning step is then used to define small breaks in the merged gate lines. During the course of the device fabrication, the space between line ends tends to undesirably grow larger due to processes such as dry or wet etches that erode short edges faster than long edges. This eventual growth in end-to-end spacing is anticipated in the initial design and layou...

Claims

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Application Information

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IPC IPC(8): H01L29/792H01L21/336
CPCH01L29/66545H01L27/0207
Inventor CHANG, JOSEPHINE B.CHANG, PAUL C.GUILLORN, MICHAEL A.SLEIGHT, JEFFREY W.
Owner GLOBALFOUNDRIES INC