Discrete power transistor package having solderless dbc to leadframe attach

Abstract

A packaged power transistor device includes a Direct-Bonded Copper (“DBC”) substrate. Contact pads of a first lead are attached with solderless welds to a metal layer of the DBC substrate. In a first example, the solderless welds are ultrasonic welds. In a second example, the solderless welds are laser welds. A single power transistor realized on a single semiconductor die is attached to the DBC substrate. In one example, a first bond pad of the die is wire bonded to a second lead, and a second bond pad of the die is wire bonded to a third lead. The die, the wire bonds, and the metal layer of the DBC substrate are covered with an amount of plastic encapsulant. Lead trimming is performed to separate the first, second and third leads from the remainder of a leadframe, the result being the packaged power transistor device.

Description

TECHNICAL FIELD[0001]The described embodiments relate to packaged discrete power transistor devices.BACKGROUND INFORMATION[0002]A package known as the TO-247 package is often used to package a power transistor die. A conventional TO-247 package includes three parallel extending metal leads, where the center lead extends from a center metal tab. The leads and the center tab are stamped from the same thick copper sheet. The power transistor die is mounted to a top side of the center tab. The center tab and the die are then overmolded with a plastic encapsulant such that the three leads extend parallel to one another from the amount of plastic encapsulant. A backside surface of the metal tab is, however, left exposed and is not covered with encapsulant. This backside surface of metal forms the backside of the packaged device. The backside of the tab is often electrically coupled to the bottom side of the integrated circuit die. In operation, a high voltage may be present on the bottom ...

AI Technical Summary

Benefits of technology

The patent describes a packaged power integrated circuit device that includes a DuBryan Copper (“DBC”) substrate with a power semiconductor integrated circuit die attached to it using solderless welds. The DBC substrate has insulation layers and metal layers on its sides. The device is covered with a plastic encapsulant, and lead trimming and second metal layer exposure are performed to form the final shape of the device. The patent describes different methods for the solderless welds, including ultrasonic welding and laser welding, and their effects on the contact pads and semiconductor die. The technical effect of the invention is to provide a reliable and efficient packaged power integrated circuit device that ensures good thermal conductivity and electrical insulation.

Problems solved by technology

For various reasons including safety reasons, it is undesirable that the high voltage from the bottom side of the die be present on the heatsink.

These different structures for providing high voltage isolation are undesirable in certain circumstances of for various reasons.

Images