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Semiconductor device

a technology of semiconductor devices and memory arrays, applied in semiconductor devices, digital storage, instruments, etc., can solve problems such as the reduction of the size of memory cells

Active Publication Date: 2015-07-02
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a semiconductor device with two sets of memory strings that are connected to each other using a common source line. The common source line has a structure that includes a conductive layer and a silicon layer. The technical effect of this structure is that it allows for faster and more efficient processing of data within the device, improving its overall performance.

Problems solved by technology

The number of memory cells may be increased by reducing memory cell size, but there are limitations in memory cell size reduction.

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

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Embodiment Construction

[0021]Hereinafter, various embodiments will be described in detail with reference to the accompanying drawings. The figures are provided to allow those having ordinary skill in the art to understand the scope of the embodiments of the disclosure. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art.

[0022]FIG. 1 is a block diagram illustrating a semiconductor memory device according to an embodiment.

[0023]Referring to FIG. 1, a semiconductor memory device may include a memory array 110 and operation circuits 120 and 130. The operation circuits may include a voltage supply circuit 120 and a read / write circuit 130.

[0024]The memory array 110 may include memory block layers 110BL0 to 110BL3 that are stacked over a substrate...

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Abstract

A semiconductor device includes first memory strings coupled between a first common source line formed on a substrate and bit lines formed over the first common source line, and second memory strings coupled between the bit lines and a second common source line formed over the bit lines, wherein each of the bit lines includes a stacked structure of a conductive layer and a silicon layer formed on the conductive layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application claims priority to Korean patent application number 10-2013-0165326 filed on Dec. 27, 2013, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated by reference herein.BACKGROUND[0002]1. Technical Field[0003]Various embodiments relate generally to a semiconductor device and, more particularly, to a semiconductor device including a three-dimensional memory array and a method of operating the same.[0004]2. Related Art[0005]One possible way to increase data storage capacity is to provide a larger number of memory cells within a predetermined area. The number of memory cells may be increased by reducing memory cell size, but there are limitations in memory cell size reduction. Another method for increasing the number of memory cells is to provide a three-dimensional (3D) structured memory block (or memory string) where memory cells are stacked in a direction vertical to a semiconductor...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C16/04H10B69/00
CPCG11C16/0483G11C5/02G11C5/025G11C5/06H10B41/35H10B41/27H10B43/35H10B43/27H10B41/30H01L29/7926G11C2213/71H01L29/7889H01L29/78642
Inventor ARITOME, SEIICHI
Owner SK HYNIX INC