Method of forming a passivation layer

Abstract

A method of forming a passivation layer on an integrated circuit (IC) chip including a device layer on a substrate. The method may include forming a crosslinked precursor passivation layer on the IC chip, and curing the crosslinked precursor passivation layer at a first temperature to form a passivation layer. The method may further include maintaining the device layer at a second, lower temperature during the curing of the crosslinked precursor passivation layer. Maintaining the device layer at the second, lower temperature may mitigate and / or prevent damage to the device layer conventionally caused by exposure to the first temperature during the curing of the crosslinked precursor passivation layer. The method may include using a curing system including a chamber, an infrared source for controlling the first temperature for curing the crosslinked precursor passivation layer, and a temperature control device for controlling the second, lower temperature of the device layer.

Description

BACKGROUNDTechnical Field[0001]The present disclosure relates to integrated circuit technology, and more specifically, to methods of forming a passivation layer on an integrated circuit (IC) chip.Related Art[0002]Integrated circuit (IC) chips can include billions of interconnected devices, such as transistors, resistors, capacitors, and diodes, located in layers of materials. The quality and viability of a product including an IC chip can be at least partially dependent on the techniques used for fabricating and packaging the IC chips and the structure of various components therein. Fabrication of an IC chip can include two phases: front-end-of-line processes (FEOL) and back-end-of-line processes (BEOL). FEOL generally includes fabrication processes performed on a wafer up to and including the formation of gate materials (e.g., a polysilicon gate) for a transistor structure. A group of vertically-extending conductive contacts can provide electrical connections to the transistor from...

AI Technical Summary

Benefits of technology

The patent text describes a method for forming a passivation layer on an integrated circuit (IC) chip while preventing thermal degradation of the device layer. The method involves curing a precursor passivation layer at a low temperature while using a temperature control device to maintain the device layer at a lower temperature. The text also describes a method for forming a polyimide layer on an IC chip while preventing thermal degradation of the device layer. This involves crosslinking a photosensitive polyimide (PSPI) precursor layer on the chip and curing it at a low temperature using a curing system that includes a chamber, a radiation source, and a temperature control device. Overall, the patent text provides methods for protecting the device layer of an IC chip during the formation of the passivation layer and polyimide layer without compromising their quality and reliability.

Problems solved by technology

One issue associated with this conventional curing method includes reduced IC chip performance caused by the exposure to the high temperature of the curing process.

For example, exposing the entire IC chip to the requisite high temperature of the curing process may result in thermal degradation of the device layer.

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