Successive approximation register analog to digital converter and offset detection method thereof

a technology of approximation register and offset detection method, which is applied in the field of successful approximation register analog to digital converter and offset detection method thereof, can solve problems such as degrading the performance of ti adc, and achieve the effect of enhancing the performance and robustness of sar ad

Active Publication Date: 2020-10-15
NOVATEK MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0005]A SAR ADC and a method of detecting offset that are capable of e

Problems solved by technology

However, such a structure suffers from offset mismatch, gain misma

Method used

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  • Successive approximation register analog to digital converter and offset detection method thereof
  • Successive approximation register analog to digital converter and offset detection method thereof
  • Successive approximation register analog to digital converter and offset detection method thereof

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Embodiment Construction

[0016]It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present disclosure. Also, it is to be understood that the phraseology and terminology used herein are for the purpose of description and should not be regarded as limiting. The use of “including,”“comprising,” or “having” and variations thereof herein is meant to encompass the items listed thereafter and equivalents thereof as well as additional items. Unless limited otherwise, the terms “connected,”“coupled,” and “mounted,” and variations thereof herein are used broadly and encompass direct and indirect connections, couplings, and mountings.

[0017]Referring to FIG. 1, a schematic diagram of a successive approximation register (SAR) analog to digital converter (ADC) 100 is illustrated. The SAR ADC 100 may include input terminals IN1 and IN2, switches SWa and SWb, capacitor arrays 110a and 110b, a switching circuit 120, a comparator 130, a SAR ...

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Abstract

A successive approximation register (SAR) analog to digital converter (ADC) and a method of detecting an offset of a comparator are introduced. The SAR ADC includes a switch circuit, a comparator and a calibration circuit. The switch circuit is configured to perform a swapping operation on a first intermediate analog signal and a second intermediate analog signal to generate a first swapped analog signal and a second swapped analog signal. The comparator is coupled to the switching circuit and is configured to compare the first intermediate analog signal and the second intermediate analog signal before the swapping operation to generate a least-significant-bit value. The comparator is further configured to compare the first swapped analog signal and the second swapped analog signal after the swapping operation to generate a calibration bit value. The calibration circuit is configured to determine whether the comparator has an offset according to the least-significant-bit value and the calibration bit value.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of U.S. provisional application Ser. No. 62 / 831,199, filed on Apr. 9, 2019. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.BACKGROUNDTechnical Field[0002]The disclosure generally relates to analog-to-digital converter (ADC), and more particularly to “top-plate swapping” technique to detect a comparator offset in a successive approximation register (SAR) ADC that is capable of enhancing the performance and robustness of the SAR ADC.Description of Related Art[0003]ADCs with moderate resolution and gigahertz sampling rate are in high demand for a large number of applications in different fields such as wireless communication and consumer electronics. To achieve such high speed, the time interleaving (TI) structure is widely adopted. However, such a structure suffers from offset mismatch, gain mismatch and timin...

Claims

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Application Information

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IPC IPC(8): H03M1/46H03M1/12H03M1/10
CPCH03M1/462H03M1/1245H03M1/466H03M1/1023H03M1/38
Inventor HUANG, CHUN-POKUO, LIANG-TINGCHENG, YI-SHENLEE, CHIA-CHUANCHANG, SOON-JYH
Owner NOVATEK MICROELECTRONICS CORP
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