Systems and methods for automatically eliminating imbalance between signals

Abstract

A calibrating system for automatically eliminating or reducing imbalance between a first signal and a second signal is disclosed. The calibrating system includes: a programmable delay module, receiving to the first and the second signals; a phase detecting module, coupled to the programmable delay module, for receiving the first and the second signals from the programmable delay module, and comparing a phase of a reference signal with phases of the first and the second signals, respectively; and a de-skew controlling module, coupled to the programmable delay module and the phase detecting module, for controlling the programmable delay module to eliminate imbalance between the first and the second signals by at least delaying the first signal according to a comparison result of the phase detecting module.

Description

BACKGROUND[0001]The disclosure relates to a calibration system, and more particularly, to calibration systems and calibration methods for automatically eliminating imbalance between two or more signals.[0002]Although the delay for each interface trace is expected to be exactly the same, in the actual circuit, the circuit layout may cause various lengths of delay (or skew) between parallel bus interfaces. For example, dynamic random access memory (DRAM) utilizes parallel buses to transfer data, known as data signals DQ, and data strobe signals, known as DQS. The data strobe signal DQS is utilized to access data carried by the data signal. Unfortunately, as mentioned previously, because of the skew caused by the circuit layouts, the signals transferred through different buses may travel through different paths. There are phase differences between these signals. Because of the phase differences, it is more difficult to utilize the data strobe signal to properly align the data signal DQ...

AI Technical Summary

Benefits of technology

The system effectively eliminates signal imbalances across parallel buses, ensuring accurate data recovery and alignment, independent of human intervention and environmental factors.

Problems solved by technology

Although the delay for each interface trace is expected to be exactly the same, in the actual circuit, the circuit layout may cause various lengths of delay (or skew) between parallel bus interfaces.

Unfortunately, as mentioned previously, because of the skew caused by the circuit layouts, the signals transferred through different buses may travel through different paths.

Because of the phase differences, it is more difficult to utilize the data strobe signal to properly align the data signal DQ and to correctly recover the data from the data signal DQ.

However, the aforementioned method does not sufficiently compensate for the measurement of the phase differences because of its reliance on humans.

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