Unlock instant, AI-driven research and patent intelligence for your innovation.

Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same

a technology of electromagnetic discharge circuit and semiconductor chip, which is applied in the field of electromagnetic discharge circuit and method for reducing input capacitance of semiconductor chip including same, can solve the problems of internal circuits being fatally damaged, the size of dram devices continues to decrease, and the semiconductor device can be destroyed by incidental contact with charged objects in the device's environment, etc., to achieve the effect of reducing the input capacitance of a semiconductor chip and reducing the input capacitance of a semiconductor

Inactive Publication Date: 2010-07-27
SAMSUNG ELECTRONICS CO LTD
View PDF9 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The solution effectively reduces input capacitance, increasing the number of semiconductor chips that can be driven by each output pin, enhancing the performance and reliability of memory modules by effectively managing static electricity discharge.

Problems solved by technology

For example, unless a semiconductor device is designed to withstand static electricity, the semiconductor device can be destroyed by incidental contact with charged objects in the device's environment.
Where current from static electricity flows into internal circuits of the semiconductor device designed to operate at relatively low voltages, the internal circuits can be fatally damaged.
The problem of protecting DRAM devices against static electricity becomes increasingly important as the size of the DRAM devices continues to decrease.
However, using such stack packages tends to increase the overall input capacitance of the devices.
Increasing the input capacitance of semiconductor devices tends to decrease the setup margin of the devices, causing defects in their operation or otherwise degrading their performance.
Certain sources of input capacitance cannot be readily modified to reduce the input capacitance.
For example, components necessary for proper operation of the chips, such as drivers, cannot be readily modified to reduce the input capacitance in order to overcome the lack of setup margin.
More particularly, the number of semiconductor chips that can be driven by each output pin of a driver of the memory module is limited by the input capacitance of the semiconductor chips.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same
  • Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same
  • Electrostatic discharge circuit and method for reducing input capacitance of semiconductor chip including same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0050]Exemplary embodiments of the invention are described below with reference to the corresponding drawings. These embodiments are presented as teaching examples. The actual scope of the invention is defined by the claims.

[0051]FIG. 4 is a graph illustrating a relationship between a junction capacitance Cj and a reverse bias voltage Vj in a semiconductor device. As seen in FIG. 4, an increase in reverse bias voltage Vj from 0V to 1V reduces junction capacitance Cj by about 0.1 pF. As reverse bias voltage Vj increases further, junction capacitance Cj decreases further.

[0052]The relationship between junction capacitance Cj and reverse bias voltage Vj can be expressed mathematically by the following equation (1):

Cj=Cjo / {(1+Vj / φ)^m}.  (1)

[0053]In equation (1), the term Cjo denotes a junction capacitance in the absence of reverse bias voltage Vj, the term φ denotes a built-in voltage of a PN junction, and the term “m” is set to ½. As illustrated by equation (1), junction capacitance Cj...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A multi-mode electrostatic discharge (ESD) circuit for a semiconductor chip comprises first and second ESD diodes. In a first mode, a body voltage greater than a power source voltage of the semiconductor chip is applied to the first ESD diode and a body voltage less than a ground voltage of the semiconductor chip is applied to the second ESD diode. In a second mode, a body voltage substantially equal to the power source voltage of the semiconductor chip is applied to the body of the first ESD diode and a body voltage substantially equal to the ground voltage of the semiconductor chip is applied to the second ESD diode.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]Embodiments of the invention relate generally to semiconductor chips. More particularly, embodiments of the invention relate to an electrostatic discharge circuit capable of protecting internal circuits of the semiconductor chips from static electricity and methods of reducing an input capacitance of the semiconductor chips.[0003]A claim of priority is made to Korean Patent Application No. 10-2006-0045614, filed on May 22, 2006, the disclosure of which is hereby incorporated by reference in its entirety.[0004]2. Description of Related Art[0005]The ability to withstand high voltage static electricity can have a significant impact on the reliability of semiconductor devices. For example, unless a semiconductor device is designed to withstand static electricity, the semiconductor device can be destroyed by incidental contact with charged objects in the device's environment. The sensitivity of a semiconductor device to the ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(United States)
IPC IPC(8): H02H9/00H10B12/00
CPCH01L27/0266H01L27/04
Inventor SUNG, MYUNG-HEEAHN, YOUNG-MAN
Owner SAMSUNG ELECTRONICS CO LTD