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Apparatus, system, and method of logical address translation for non-volatile storage memory

a technology logical address translation, applied in the field of non-volatile storage memory devices, can solve the problems of linear increase in the size of the logical to physical address translation table, increase processing time (latency), and lower the overall bandwidth (speed). the effect of fast and lean

Active Publication Date: 2017-07-25
EXECUTIVE ADVISORY FIRM LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a way to make non-volatile storage systems faster and more efficient. Instead of using the entire logical address to retrieve an entry, the system uses only a portion of it as a primary key to retrieve an entry from the address translation table. This reduces the size of the table and makes the system faster and more efficient.

Problems solved by technology

The main issue with these tables is that as the size of non-volatile storage units increases, the logical to physical address translation table size will increase linearly.
Collective, they increase processing time (latency), lower overall bandwidth (speed), increase overall product power consumption, increased overall thermal usage of product, and increase the total cost of operation of a non-volatile storage unit.

Method used

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Embodiment Construction

[0024]As used in the description herein and throughout the claims that follow, the meaning of “a,”“an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.

[0025]As used herein, and unless the context dictates otherwise, the term “coupled to” is intended to include both direct coupling (in which two elements that are coupled to each other contact each other) and indirect coupling (in which at least one additional element is located between the two elements). Therefore, the terms “coupled to” and “coupled with” are used synonymously. As used herein, the term “operatively coupled to” refers to electronic components that are coupled with one another such that an electronic communication path exists between one electronic hardware component and another electronic hardware component.

[0026]Groupings of alternative elements or embo...

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Abstract

A fast and lean way of performing logical-to-physical address translation is presented. A logical address is divided into a most significant bits portion and a least significant bits portion. Instead of using the entire logical address to locate an entry in an address translation table, only the most significant bits portion of the logical address is used, which substantially reduces the size of the address translation table. The entry includes a most significant bits portion of a physical volatile memory address and a most significant bits portion of a physical non-volatile memory address. The actual physical volatile memory address and the actual physical non-volatile memory address can be derived by combining the most significant bits portions of the addresses stored in the address translation table entry with the least significant bits portion of the logical address.

Description

[0001]This application claims the benefit of U.S. provisional application No. 62 / 188,602, filed Jul. 3, 2015. This and all other extrinsic references referenced herein are incorporated by reference in their entirety.FIELD OF THE INVENTION[0002]The field of the invention is non-volatile memory devicesBACKGROUND[0003]The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.[0004]All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition o...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G11C29/18G06F3/06G06F12/00
CPCG06F3/061G06F3/0608G06F3/0631G06F3/0688G06F12/00G06F12/0246G06F12/1009Y02D10/00
Inventor AMIDI, MIKE HOSSEIN
Owner EXECUTIVE ADVISORY FIRM LLC