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Semiconductor memory device, method for driving the same and portable electronic appararus

A storage device and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problem that it is difficult to reduce the thickness of the gate insulating film, which hinders the reduction of the size of the memory cell, and it is difficult to effectively reduce the insulation Thickness of film 907 and gate insulating film etc.

Inactive Publication Date: 2008-09-17
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, in this flash memory, from a functional point of view, it is necessary to arrange an insulating film 907 for separating the floating gate 902 and the word line 903.
In addition, in order to prevent leakage of charges from the floating gate 902, it is difficult to reduce the thickness of the gate insulating film
Therefore, it is difficult to effectively reduce the thicknesses of the insulating film 907 and the gate insulating film, thereby hindering the reduction in the size of the memory cell.

Method used

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  • Semiconductor memory device, method for driving the same and portable electronic appararus
  • Semiconductor memory device, method for driving the same and portable electronic appararus
  • Semiconductor memory device, method for driving the same and portable electronic appararus

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no. 1 approach

[0097] Such as figure 1 As shown, the semiconductor memory device of the first embodiment has a memory cell 1 .

[0098] The memory cell 1 has a gate electrode 104 formed on a P-type well region 102 formed on the surface of a semiconductor substrate 101 via a gate insulating film 103 . A silicon nitride film 109 having a trap level for holding charges and serving as a charge holding film is arranged on the top surface and side walls of the gate electrode 104 . In the silicon nitride film 109, portions on both sides of the gate electrode 104 are used as memory function units 105a and 105b to actually hold charges. The storage functional unit refers to a portion in which charges are actually accumulated in the storage functional unit, that is, the charge holding film due to a rewriting operation. In the P-type well region 102 on both sides of the gate electrode 104, N-type diffusion regions 107a and 107b serving as source and drain regions are formed, respectively. Each of t...

no. 2 approach

[0121] Such as Figure 8 As shown, except that each storage functional unit 261 and 262 is composed of a charge holding region (which is a charge accumulating region, and may be a film having a function of holding charges) and a region for suppressing charge escape (that is, a region having a function of suppressing charge escape film) configuration, the structure of the memory cell of the semiconductor memory device according to the second embodiment is basically similar to figure 1 The structure of memory cell 1.

[0122] From the viewpoint of improving memory retention characteristics, the memory functional unit includes a charge holding film and an insulating film having a function of holding charges. In the second embodiment, the silicon nitride film 242 having an energy level to trap charges is used as the charge holding film, and the silicon oxide films 241 and 243 having a function of preventing loss of charges accumulated in the charge holding film are used as insu...

no. 3 approach

[0139] Such as Figure 13 As shown, the memory functional unit 262 in the semiconductor memory device of the third embodiment has a shape in which the silicon nitride film 242 as a charge holding film has an almost uniform thickness and is arranged substantially parallel to the gate insulating The surface of the film 214 (region 281 ) is also substantially parallel to the side faces of the gate electrode 217 (region 282 ).

[0140] In the case where a positive voltage is applied to the gate electrode 217, the electric force line in the memory function unit 262 passes through the silicon nitride film 242 twice (regions 282 and 281) as indicated by arrows. When a negative voltage is applied to the gate electrode 217, the direction of the electric force line is reversed. Here, the dielectric constant of the silicon nitride film 242 is about 6, and the dielectric constant of the silicon oxide films 241 and 243 is about 4. Therefore, compared with the case where only the charge h...

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Abstract

A method for driving a semiconductor memory device includes a memory array having a plurality of memory cells arranged in rows and columns. Each memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, a source and a drain as diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function of retaining charges. The method includes the steps of: selecting a row line connected to the gate electrode of a memory cell to be selected; grounding a first column line connected to the source of the memory cell to be selected; and applying a first potential to a second column line and a second potential to a third column line at the same time.

Description

technical field [0001] The present invention relates to a semiconductor memory device using a nonvolatile memory, a method of driving the semiconductor memory device, and a portable electronic device. Background technique [0002] In general, flash memory is typically used as nonvolatile memory. [0003] Such as Figure 24 As shown, in the flash memory, a floating gate 902, an insulating film 907, and a word line 903 (control gate) are formed in this order on a semiconductor substrate 901 via a gate insulating film. A source line 904 and a bit line 905 are formed on both sides of the floating gate 902 by diffusion regions, thereby constituting a memory cell. A device isolation region 906 is formed around the memory cell (see, for example, Japanese Unexamined Patent Publication No. Hei 5-304277 (1993)). [0004] The memory cell holds data according to the amount of charge in the floating gate 902 . In a memory cell array constructed by arranging memory cells, rewriting / rea...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/34G11C16/04H01L21/28H01L21/8247H01L27/108H01L27/115H01L29/423H01L29/788H01L29/792
CPCH01L29/7923G11C16/0475H01L29/42332H01L29/7887H01L21/28282G11C16/0491H01L29/40117
Inventor 松冈伸明那胁胜森川佳直岩田浩柴田晃秀滨口弘治
Owner SHARP KK