Method for removing dielectric layer on surface of metal layer at top of semiconductor device

Abstract

The invention discloses method for removing dielectric layer on surface of metal layer at top of semiconductor optical device. The metal layer at top possesses graph area and graph seam area. The dielectric layer covers graph area of metal layer at top, and fills in graph seam area of metal layer at top. The method includes steps: forming a sacrificial layer on the dielectric layer; etching the sacrificial layer, and dielectric layer; exposing graph area of metal layer at top.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for removing a dielectric layer on the surface of a metal layer on the top of a semiconductor optical device. Background technique [0002] In the current manufacturing process of semiconductor optical devices, a dielectric layer is usually formed on the surface of the top metal layer, and then the electrical performance test of the semiconductor optical device substrate containing the top metal layer is performed, and then the dielectric layer is removed to obtain a smooth and flat top. surface of the metal layer, and then proceed to subsequent production steps. [0003] figure 1 It is a schematic diagram of the deposition effect of the dielectric layer on the surface of the metal layer on the top of the semiconductor optical device in the prior art, such as figure 1 As shown, a dielectric layer 10 is deposited on the surface of the top metal layer...

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Problems solved by technology

[0004] However, in actual production, due to the limitation of its own working principle, it is easy to produce scratches on the surface of the material to be treated by using CMP technology to smooth the film layer

figure 2 A schematic diagram showing defects in semiconductor optical devices in the prior art, such as figure 2 As shown, when CMP technology is applied to remove the dielectric layer material covering the surface of the top metal layer to expose the top metal layer pattern area, it is easy to produce circular grinding defects in the top metal layer pattern area, and then when the semiconductor optical device 50 is in working condition , resulting in circular display defects 40, affecting the display performance of the device

[0005] image 3 Schematic diagram of the effect of etching depressions in the top metal layer pattern line seam area for removing the dielectric layer on the top metal layer surface by traditional etching methods, as shown image 3 As shown, if an etching method is used to directly remove the top metal layer 20 surface dielectric layer 10, due to the non-uniform thickness of the dielectric layer material, an etching recess 60 will be produced in the top metal layer pattern line seam area 30, so that the top metal layer pattern The height of the dielectric layer in the seam area 30 is lower than the height of the top metal layer, which is easy to cause a short circuit between the reflective metal patterns in the subsequent process, and then cause display defects of the device

[0006] The Chinese patent application with the patent number "98115044.6" provides a method for removing CMP scratches by using borophosphosilicate glass (Borophosphosilicate glass) reflow method, but this method is only applicable to the CMP planarization repair of the oxide dielectric layer in the device process, powerless to repair scratches on the surface of the metal layer on top of semiconductor optics

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