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Manufacturing method of semiconductor device grids

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as gate corrosion, loss size shift, increase process complexity, etc., to achieve easy removal, easy removal, Good contouring effect

Inactive Publication Date: 2009-07-22
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although it solves a series of process problems such as size shift and physical morphology collapse caused by excessive loss of photoresist in the long-term reduction process, this two-step reduction process for manufacturing gates needs to be formed by The hard mask composed of silicon nitride undoubtedly increases the complexity of the process, and the removal of the hard mask uses phosphoric acid, which is easy to corrode the doped gate

Method used

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  • Manufacturing method of semiconductor device grids
  • Manufacturing method of semiconductor device grids
  • Manufacturing method of semiconductor device grids

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Embodiment Construction

[0043] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0044] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many ways other than those described here, and those skilled in the art can make similar extensions without departing from the connotation of the present invention. Accordingly, the invention is not limited to the specific implementations disclosed below.

[0045] The method for manufacturing gates of semiconductor devices provided by the present invention is particularly suitable for manufacturing gates of semiconductor devices with a feature size of 65nm or below. The semiconductor device is not only a MOS transistor, but also a PMOS t...

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Abstract

The invention provides a method for manufacturing a gate of a semiconductor device, comprising: forming a dielectric layer on a semiconductor substrate; forming a polysilicon layer on the dielectric layer; forming a stacked layer structure on the polysilicon layer; forming a photoresist layer on the layer structure; patterning the photoresist layer to define the position of the gate; etching the stacked layer structure and the polysilicon layer to form the gate. The method of the invention can manufacture a gate with a good profile without forming a hard mask, and is especially suitable for the manufacture of a gate with a line width feature size below 65nm.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a gate of a semiconductor transistor. Background technique [0002] Polysilicon is the preferred material for manufacturing gates, which has special heat resistance and high etching and patterning accuracy. The manufacturing method of the gate first needs to form a layer of gate silicon oxide on the semiconductor substrate, then deposit a polysilicon layer on the gate oxide layer, and then coat a fluid bottom anti-reflection layer (BARC) and photoresist. After patterning the photoresist layer, etching the polysilicon layer to form a gate. Figure 1 to Figure 4 It is a schematic cross-sectional view illustrating a conventional gate manufacturing method. Such as figure 1 As shown, a gate oxide layer 110 is grown on a substrate 100, a polysilicon layer 120 is deposited on the gate oxide layer 110, and then the polysilicon layer is et...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336
Inventor 马擎天刘乒张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP