Time inverse-interlacing memory reducing method for DMB signal receiver
A technology of signal receiver and memory, which is applied in the invention field of digital multimedia broadcasting, can solve problems such as waste of memory, and achieve the effect of reducing the size of the gate
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0039] Hereinafter, the structure and function of the embodiment of the present invention will be described with reference to the drawings.
[0040] image 3 It is a block diagram of the DMB signal receiver in the present invention.
[0041] Refer to image 3 , The DMB signal receiver includes the following components: the antenna 11 that receives the transmitted broadcast signal; the tuning of the received signal input to the above-mentioned antenna 11 into the required intermediate frequency (Intermediate Frequency) pass-band signal In the above-mentioned tuned signal, in order to maintain the size of the signal input to the A / D converter 14, the AGC (Automatic GainControl) device 13 that multiplies the calculated gain value according to the standard signal; the above-mentioned certain size A / D converter 14 that converts the converted digital signal into a digital signal by sampling processing; a mode detection device 15 that detects the transmission mode of the converted digita...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 