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Flash memory system compensating reduction in read margin between memory cell program states

一种存储系统、存储单元阵列的技术,应用在信息存储、静态存储器、只读存储器等方向,能够解决难以保证状态读余量、难以知道存储单元状态、阈值电压降低等问题

Active Publication Date: 2007-08-01
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the threshold voltage increases due to electric field coupling / multi-F coupling, and the threshold voltage decreases due to HTS, which makes it difficult to guarantee the read margin between states
Specifically, it is difficult to know the state of a programmed memory cell
This problem has become serious as semiconductor manufacturing processes have recently become more complex

Method used

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  • Flash memory system compensating reduction in read margin between memory cell program states
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  • Flash memory system compensating reduction in read margin between memory cell program states

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Embodiment Construction

[0022] Now, the present invention will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout the figures.

[0023] FIG. 4 is a block diagram of a flash memory device according to an embodiment of the present invention, which includes a memory cell array 100 for storing data information. The memory cell array 100 includes a plurality of memory blocks each having the memory cell configuration shown in FIG. 5 .

[0024] 5 is a circuit diagram of the memory cell array shown in FIG. 4, which includes a memory block MB containing a ...

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Abstract

A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.

Description

technical field [0001] Embodiments of the present invention relate to a flash memory system. More specifically, embodiments of the present invention relate to flash memory systems capable of compensating for reduced read margins between programmed states of memory cells. [0002] This patent application claims priority under 35 U.S.C. §119 to Korean Patent Application 2006-07414 filed January 24, 2006, the entire contents of which are hereby incorporated by reference. Background technique [0003] In recent years, storage devices such as volatile storage devices and nonvolatile storage devices have been gradually applied to MP3 players and mobile devices, such as portable multimedia players (PMP), cellular phones, notebook computers, and personal digital Assistant (PDA). The MP3 player and the mobile device require mass storage devices to provide various functions (eg, motion picture playback). Much effort has been made to meet this need. One of these efforts is to propo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/10G11C16/06
CPCG11C11/5628G11C16/0483G11C16/3454G11C16/3459B23K37/0443B23Q17/006B25B11/00
Inventor 姜相求林瀛湖
Owner SAMSUNG ELECTRONICS CO LTD
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