'Soft error' suppress circuit based on isolate method

A technology for suppressing circuits and soft errors, applied in information storage, static memory, digital memory information, etc., can solve the problem of "soft error" suppression effect is small

Inactive Publication Date: 2007-08-22
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this approach, the transmission gate is always on, and

Method used

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  • 'Soft error' suppress circuit based on isolate method
  • 'Soft error' suppress circuit based on isolate method
  • 'Soft error' suppress circuit based on isolate method

Examples

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Embodiment Construction

[0031] The circuit of the present invention can be slightly improved and obtained from the existing SRAM unit circuit: two transmission gate units are added, wherein, the grid of the NMOS transistor of the transmission gate is connected to the control line of the Bit line; and the grid of the PMOS transistor is grounded, Leave it normally open. In addition, there is no need to make any changes to the original circuit.

[0032] When this circuit is applied in a SRAM cell, it is shown in the figure. The work of the circuit is divided into two states: access state (AccessState) and hold state (Keep State), as shown in Figure 1. In the access state, the control signal makes the transmission gate turn on, and the data is stored or read normally; in the hold state, the NMOS transistor of the transmission gate is turned off, and the PMOS transistor is turned on. A sub-hit is equivalent to connecting an inrush current source at point A(C), as shown in Figure 2. The instantaneous im...

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Abstract

A soft-error suppression circuit based on an insolation method belongs to a high reliable IC design field characterizing in using controllable transmission doors to isolate sensing nodes in the circuit so as to separate the soft-error transmission path and restrain its happening.

Description

technical field [0001] The application field of "'Soft Error' Suppression Circuit Structure Based on Isolation Method" is the design of high-reliability large-scale integrated circuits. The proposed circuit is suitable for integrated circuits that need to work in strong radiation areas. It can greatly suppress the instantaneous current generated when neutrons, alpha particles, cosmic rays and other radiation sources irradiate the CMOS transistor channel at the cost of relatively small power consumption and area. So as to achieve the purpose of suppressing "soft errors". Background technique [0002] As the feature size of the CMOS process has entered 100 nanometers, the number of transistors integrated on a chip is increasing, and at the same time, more and more storage resources such as SRAM and cache memory are integrated on the chip. At this time, the probability of "soft errors" in the circuit is also increasing. [0003] "Soft Errors" (Soft Errors) is a temporary abn...

Claims

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Application Information

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IPC IPC(8): G11C11/412G11C11/417
Inventor 罗嵘何苦陈亦波杨华中
Owner TSINGHUA UNIV
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