System and method for realizing interconnect between main processor and coprocessor interface

Abstract

The invention discloses a kind of system to realize connection between main processor and coprocessor, which includes main processor, at least one coprocessor, dual-port data memory, data bus of main processor, data bus of coprocessor, at least one instruction register, and at least one state register. The invention also discloses a kind of method to realize connection between main processor and coprocessor, and it includes: A. the main processor writes the data which will be transmitted to coprocessor in the indicated storage region of dual-port data memory, and sends starting command to coprocessor; B. the coprocessor receives the starting instruction and returns the state character of receiving instruction, and accesses the indicated storage section to get the data written by main processor, and runs the operation defined in starting instruction; C. when the coprocessor finishes the operation, it returns the status character of finishing command to main processor, and the main processor gets the result of coprocessor.

Description

technical field [0001] The invention relates to the technical field of computer architecture and VLSI design, in particular to a system and method for realizing the interface and interconnection of a main processor and a coprocessor. Background technique [0002] A coprocessor is a processor that extends the main processor and assists the main processor in completing special application processing for different applications and requirements. Such as floating-point arithmetic coprocessor, multimedia coprocessor, etc. [0003] Coprocessors are programmable. The coprocessor has a coprocessor instruction set expanded on the basis of the main processor instruction set, and the coprocessor contains application-specific functional units that can be used to accelerate the processing of a specific application. [0004] Traditionally, the interface between the main processor and the coprocessor adopts a relatively complex and tightly coupled method. For example, Advanced RISC Machi...

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Problems solved by technology

[0005] However, the existing main processor and coprocessor interface and interconnection structure have some unavoidable inherent defects

For example, the compatibility is not strong, and it can only support specific main processors and coprocessors; the granularity of data processing by coprocessors is relatively fine, and it can only effectively process a single data word, and cannot support coarser granularity data processing ; The coprocessor and the main processor share a pipeline, and the two cannot run in parallel at the same time; does not support flexible coprocessor instruction set design, etc.

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