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Multiple speed transmission digital video data method

A technology of digital video and transmission method, which is applied in the field of double-speed transmission of digital video data, to achieve the effects of improving transmission efficiency, wide application prospects, and strong practicability

Inactive Publication Date: 2008-04-09
WUHAN HENGYI ELECTRONICS TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, too few video input channels of chips such as DSP and SOC have become one of the bottlenecks for the high-efficiency application of digital video signal processing chips.

Method used

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  • Multiple speed transmission digital video data method
  • Multiple speed transmission digital video data method
  • Multiple speed transmission digital video data method

Examples

Experimental program
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Embodiment

[0025] Take the number of input video channels as 8 channels and the standard as PAL as an example: the ITU-656 interface can transmit data with a size of 720×576 and a frame rate of 25 frames per second, and input 8 channels of ITU-656 digital video signals through the FPGA, and the FPGA Perform horizontal and vertical 1 / 2 sampling of each video signal. In the ITU-656-like interface, by redefining the format, the transmission clock is doubled, and the transmission size is 1440×576 and the frame rate is 25 frames / seconds of data. Therefore, 8 real-time digital video signals with reduced resolution can be transmitted through this interface. At the same time, on the other interface, one of the eight channels can be time-shared to input a digital video signal with a standard resolution of 720×576. The steps of this embodiment are:

[0026] 1. Use a suitable video decoder to convert 8 input analog signals into 8 standard ITU-656 digital video signals, and the pixel of each sign...

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Abstract

The invention relates to the video signal processing field, more particularly to a digital video data double transfer method. The method performs decoding, sampling and synthesis for input ITU-656 digital video signals with multipath resolution factor of D1 or 4CIF, wherein, each four lines of video signals are synthesized to one line of ITU-656 digital video signal with resolution factor of D1 or 4CIF; redefines the information format of the video signal input / output interface as ITU-656 taxonomy and then input the synthesized two lines or multiple lines of digital video signals with resolution of D1 or 4CIF to a digital video signal processing unit by the digital video interface. The invention solves the problem of digital video signal processing chip high efficiency application, and improves the video signal transfer efficiency greatly, with wide application prospects.

Description

technical field [0001] The invention relates to the field of video signal processing, in particular to a method for double-speed transmission of digital video data. Background technique [0002] In the field of computer and information technology, especially in the field of digital video signal processing, digital signal processors (DSP) and system-on-chip (SOC) are usually used as the core processing units of digital video signals. The ITU-656 format is an interface developed by the International Telecommunications Union to transmit video data through parallel data lines and clock lines, such as image 3 shown. The line synchronization and field synchronization of the video signal are carried by the characteristic marking data embedded in the data stream. When the digital video processing chip supporting the ITU-656 interface receives the data stream, it recovers the line and field synchronization by detecting the characteristic data, so as to obtain the data from the data ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N19/40H04N19/59
Inventor 胡志雄
Owner WUHAN HENGYI ELECTRONICS TECH DEV
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