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Address mapping system and frame storage compression of video frequency decoding based on blocks

An address mapping and video decoding technology, which is applied in the fields of digital video signal modification, television, electrical components, etc., can solve the problem of error code diffusion, increase the storage space of line activation times, and increase the amount of data, so as to reduce energy consumption and storage. Bandwidth requirements, the effect of reducing bandwidth requirements

Inactive Publication Date: 2011-08-17
TSINGHUA UNIV
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Problems solved by technology

These methods can reduce the amount of stored data, but the common problem is that the lossy compression is used for the reference frame data, which will reduce the quality of the image and cause the problem of error diffusion; in addition, the processing uses variable length or Transform coding, when the referenced macroblock needs to span multiple adjacent macroblocks, it will increase the amount of data that needs to be read, bringing additional costs
At the same time, in the process of motion compensation, the amount of data to be read is generally greater than the amount of data to be written. Therefore, in order to reduce the number of row transformations when reading data, Zhang proposed a method of pixel copying, which converts the pixels of the previous row to Copy a part and store it in the next row, but this method will increase the required storage space while reducing the number of row activations (see the literature Peng Zhang, Wen Gao, Di Wu, and Don Xie, "An Efficient Reference Frame Storage Scheme for H. 264 HDTV Decoder,"Proceedings of ICME 2006, pp.361-364, 2006.)

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  • Address mapping system and frame storage compression of video frequency decoding based on blocks
  • Address mapping system and frame storage compression of video frequency decoding based on blocks
  • Address mapping system and frame storage compression of video frequency decoding based on blocks

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Embodiment Construction

[0067] The implementation block diagram of traditional MPEG video decoding is as attached Figure 1 Shown, where the thick arrow line represents the data signal, and the thin arrow line represents the control signal. The decoding of the video stream is performed in units of frames, and each frame is performed in units of macroblocks. The main controller controls the entire decoding process, so that all modules work together to complete video decoding. The display control performs image rearrangement on the decoded frames, and controls the time in sequence for display. The input compressed bit stream is first entropy decoded to obtain transformed frequency domain coefficients, and then inversely transformed and inversely quantized to obtain pixel domain data. If it is an I frame, it is the image data, which can be directly stored in the frame; if it is a P frame or a B frame, the obtained is the residual data, which needs to be added to the referenced data (that is, motion co...

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Abstract

The invention relates to a block-based frame storing and compressing and address mapping system for video decoding, which belongs to the technical field of the video decoding. The system is characterized in that block data with the number of different data smaller than or equal to 16 is compressed through adopting a lossless fixed length coding method after inputted bit stream is entropy-decoded,inversely transformed and inversely quantized, four kinds of coding bit numbers are adopted during compression, and the fixed length compression decoding is performed according to the number of different data. In the storing method for the data, the data of ten vertically and bilaterally adjacent macroscopic blocks is stored in the identical row of four memory arrays during the storing process ofSDRAM provided with the four memory arrays and adopted as an out-memorizer, and brightness data of four macroscopic blocks or chrominance data of eight macroscopic blocks can be stored in a row of each memory array, therefore, the block-based frame storing and compressing and address mapping system can ensure the data written into the memorizer to be reduced by approximately a half under the condition of error-free compressive memorization, and the operating number of the row activating of the memorizer to be reduced by approximately 85 to 95 percent, therefore, the requirements on band widthis reduced, and simultaneously the energy consumption is also reduced.

Description

technical field [0001] The technical field of direct application of "frame storage compression and address mapping system for block-based video decoding" is the optimized design for decoding video sequences compressed by block-based video codec standards. The method of the invention optimizes the storage of reference frame data in the decoding process, reduces the number of row activations and reading and writing times of the memory, thereby reducing the power consumption of the video decoding system and making full use of limited bandwidth resources. Background technique [0002] With the development of video codec technology, there are more and more types of multimedia services and their applications are becoming more and more extensive, such as digital TV, mobile TV, MP4, digital photo frame, etc. are closely related to people's lives. Among many video codec standards, block-based compression methods are mostly used, such as MPEG-2, H.264, etc.; meanwhile, these two stand...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N7/26H04N7/50H04N19/61
Inventor 高红莉乔飞杨华中汪蕙
Owner TSINGHUA UNIV
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