Semiconductor memory device using ferroelectric device and method for refresh thereof
A memory and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, static memory, etc., can solve the problems of increasing power consumption and reducing performance
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[0067] figure 1 is a cross-sectional view showing a semiconductor memory device.
[0068] A one-transistor (1-T) field effect transistor (FET) type ferroelectric memory cell includes a p-type channel region, an N-type drain region 2 and an N-type source region 3 formed in a p-type region substrate 1 . A ferroelectric layer 4 is formed over the channel region, and a word line 5 is formed over the ferroelectric layer 4 .
[0069] For process stability, a buffer insulating layer 6 may be formed between the channel region and the ferroelectric layer 4 . That is, buffer insulating layer 6 is formed to eliminate process and material differences between the channel region and ferroelectric layer 4 .
[0070] The semiconductor memory device reads and writes data in response to the channel resistance of the memory cells differentiated according to the polarization state of the ferroelectric layer 4 .
[0071] When the polarity of the ferroelectric layer 4 induces positive charges in...
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