Semiconductor device, heat sink, semiconductor chip, interposer substrate, and glass plate
A technology for intercalating substrates and semiconductors, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc. It can solve the problems of reduced heat dissipation, inability to connect with the outside, and inability to achieve high yields. Achieve the effect of preventing damage and improving yield
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Embodiment approach 1
[0073] Refer to the following figure 1 One embodiment of the present invention will be described. figure 1 (a) is a plan view showing the structure of the semiconductor device 10 of the present embodiment. figure 1 (b) means figure 1 (a) A-A' direction view. figure 1 (c) is for manufacturing figure 1 (b) is a cross-sectional view illustrating a resin sealing process of a semiconductor device.
[0074] Such as figure 1 As shown in (a), the side surface of the semiconductor device 10 of this embodiment is sealed with the sealing resin 5 . On the top surface of the semiconductor device 10 , the heat sink 11 is exposed from the sealing resin 5 . An annular stress relief portion 9 is formed on the outer edge region of the top surface of the heat sink 11 , and the cross section of the stress relief portion 9 is convex.
[0075]Here, the portion of the heat sink 11 surrounded by the annular stress relief portion 9 is exposed from the sealing resin 5 . The portion of th...
Embodiment approach 2
[0091] Refer to the following figure 2 Another embodiment of the present invention will be described. figure 2 (a) is a plan view showing the structure of the semiconductor device 30 of this embodiment. figure 2 (b) means figure 2 (a) C-C' direction view. figure 2 (c) is for manufacturing figure 2 (b) is a cross-sectional view illustrating a resin sealing process of a semiconductor device.
[0092] Such as figure 2 (a) and figure 2 As shown in (b), the side surface of the semiconductor device 30 of this embodiment is sealed with the sealing resin 5 . On the top surface of the semiconductor device 30 , the heat sink 11 is exposed from the sealing resin 5 . Two stress relief portions 9 having a convex cross-section are formed on the heat sink 11 . A portion of the heat sink 11 surrounded by one of the stress relieving portions 9 formed in a ring shape adjacent to the sealing resin 5 is exposed from the sealing resin 5 .
[0093] In the semiconductor device 30 , ...
Embodiment approach 3
[0099] Refer to the following image 3 Another embodiment of the present invention will be described. image 3 (a) is a plan view showing the structure 40 of the semiconductor device of the present embodiment. image 3 (b) means image 3 (a) D-D' direction view. image 3 (c) is for manufacturing image 3 (b) is a sectional view for explaining the resin sealing process of the semiconductor device 40 .
[0100] The semiconductor device 40 of the present embodiment is a modified example of the semiconductor device 10 described in the first embodiment. Therefore, descriptions of the same members are omitted.
[0101] Such as image 3 (a) and image 3 As shown in (b), the difference between the semiconductor device 40 and the semiconductor device 10 is that the semiconductor device 40 is formed with two ring-shaped stress relief portions 9, and the stress relief portion 9 on the inside is arranged on the same side as the stress relief portion 9 on the outside. at a slightly...
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