Frequency tripling using spacer mask having interposed regions

Abstract

The present invention relates to frequency tripling using spacer mask having interposed regions. A method for fabricating a semiconductor mask is described. A semiconductor stack having a sacrificial mask comprised of a series of lines is first provided. A spacer mask having spacer lines adjacent to the sidewalls of the series of lines of the sacrificial mask is then formed. The spacer mask also has interposed lines between the spacer lines. Finally, the sacrificial mask is removed to provide only the spacer mask. The spacer mask having interposed lines triples the frequency of the series of lines of the sacrificial mask.

Description

technical field [0001] Embodiments of the invention relate to the field of semiconductor processing. More particularly, embodiments of the present invention relate to methods of fabricating semiconductor devices. Background technique [0002] Over the past few decades, the reduction in size of features in integrated circuits has been a driving force for the growing semiconductor industry. Scaling features to smaller and smaller dimensions can increase the density of functional units on the limited available area of ​​a semiconductor chip. For example, shrinking transistor size allows for an increase in the number of logic and memory devices included on a microprocessor, allowing the manufacture of products of greater complexity. [0003] However, the size reduction is not without consequences. As the dimensions of the fundamental building blocks of microelectronic circuits are reduced and as the sheer number of fundamental building blocks fabricated in a given area increa...

AI Technical Summary

Problems solved by technology

[0003] However, the size reduction is not without consequences

Images