Non-volatile memory and operating method thereof

Abstract

A non-volatile memory and an operating method thereof are disclosed. The non-volatile memory includes a memory cell array, a first dummy cell array, an address decoding unit and a synchronous programming circuit. The memory cell array includes a first memory cell, and the first dummy cell array includes a first dummy cell. The first dummy cell is adjacent to a first side of a memory cell array and corresponds to the first memory cell. The address decoding unit receives an address signal for decoding. When the address signal is a relative address of the first dummy cell, the synchronous programming circuit controls the first dummy cell and the first memory cell to be synchronously programmed.

Description

Technical field [0001] The present invention relates to the technical field of non-volatile memory, and relates to a non-volatile memory and an operating method thereof, and in particular to a non-volatile memory and an operating method thereof for improving over-erasing phenomenon. Background technique [0002] Current electronic components usually use non-volatile memory to store large amounts of data. In order to be able to process and store this information, the non-volatile memory must have the function of being able to program or erase the memory cell array in the flash memory. [0003] Please refer to FIG. 1, which is a schematic diagram of a conventional non-volatile memory. The conventional nonvolatile memory 10 includes a memory cell array 110, a dummy cell array 122, a word line 160, and a bit line 150. The virtual cell array 122 is disposed on both sides of the edge of the memory cell array 110, and the memory cell array 110 and the virtual cell array 122 are composed...

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Problems solved by technology

[0005] However, since the virtual unit 1222 adjacent to the storage unit 1122 is in the state of being erased for a long time, it will cause the phenomenon of over erasing.

When the over-erasing phenomenon occurs, bit line to bit line current leakage Ileak (bit line to bit line current leakage) will flow through the dummy unit 1222 adjacent to the memory unit 1122, thereby affecting the non-volatile memory during reading. read result

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