Method of fabrication of a finfet element

A fin field effect and manufacturing method technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low ion energy and inability to meet the performance of fin field effect transistors, and meet the performance requirements Effect
CN101359622AInactive Publication Date: 2009-02-04TAIWAN SEMICON MFG CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
TAIWAN SEMICON MFG CO LTD
Publication Date
2009-02-04
Estimated Expiration
Not applicable · inactive patent

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Abstract

The present disclosure provides a method of fabricating a Fin FET element including providing a substrate including a first fin and a second fin. A first layer is formed on the first fin. The first layer comprises a dopant of a first type. A dopant of a second type is provided to the second fin. High temperature processing of the substrate is performed on the substrate including the formed first layer and the dopant of the second type. The invention provides unniform doping profile and does not generate shadow shielding effect, and satisfies performance requirement of the Fin FET element.
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Description

technical field

[0001] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a fin field effect transistor device. Background technique

[0002] A double-gate metal oxide semiconductor field effect transistor (double-gate MOSFET) is a metal oxide semiconductor field effect transistor that combines two gate structures into a single device. The device is also known as a Fin Field Effect Transistor (FinFET) because its structure includes "fins" extending from the substrate. FinFETs can be manufactured using the technology of general metal-oxide-semiconductor field-effect transistors. A typical FinFET is fabricated on a silicon layer with an insulating layer covering it, and the above-mentioned device will extend out of the insulating layer, like a fin of the silicon layer. Channels for field effect transistors are formed in the vertical fins. And the double gate structure is formed on the fin. T...

Claims

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