Semiconductor device, wafer coarse alignment mark and coarse alignment method

Abstract

The invention discloses a wafer coarse alignment mark, comprising: a first structure and a second structure distributed around the first structure; the first structure is in a shape of cross, the second structure comprises four groups of gratings in which two adjacent groups of gratings are perpendicular to one another. The invention also discloses a semiconductor device and a coarse alignment method. The inventive semiconductor device, wafer coarse alignment mark and coarse alignment method strengthen success ratio of precise alignment on account of addressing the problem of failing to precisely align the wafers after the coarse alignment in the prior art.

Description

technical field [0001] The invention relates to a photolithography process, in particular to a semiconductor device, a wafer rough alignment mark and a rough alignment method in the photolithography process. Background technique [0002] With the development of semiconductor technology, the area of ​​semiconductor chips is getting smaller and smaller, and the line width in the chip is also shrinking. Therefore, the test of semiconductor process capability is also increasing, and the control of process accuracy and process variation has also become more and more important. more important. In the process of manufacturing semiconductor chips, the most important process is lithography, which is a process of transferring the mask pattern to the wafer through a series of steps such as alignment, exposure, and etching. Therefore, lithography The quality of the process will directly affect the performance of the final chip. [0003] At present, there are mainly two kinds of device...

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Problems solved by technology

[0010] The present invention provides a semiconductor device, a rough alignment mark of a wafer and a rough alignment method, which solves the problem that the fine alignment mark cannot be found in the fine alignment of lithography in the prior art and the fine alignment fails, so that the lithography cannot continue question

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