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Low power buffer circuit

A buffer circuit and circuit technology, applied in the direction of logic circuit connection/interface layout, electrical components, adjusting electrical variables, etc., can solve problems such as long steady state time and high power consumption

Active Publication Date: 2009-04-01
RICHWAVE TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] As can be seen from the above, the prior art utilizes the first buffer circuits 110, 210 and the second buffer circuits 120, 220 to provide positive reference voltages and negative reference voltages, however, these buffer circuits have a relatively long settling time and higher power consumption

Method used

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Examples

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Embodiment Construction

[0022] Please refer to image 3 , image 3 It is a schematic circuit diagram of a dual-output buffer circuit 300 of the present invention, and the dual-output buffer circuit 300 is driven by a voltage from VDD to VSS. The dual output buffer circuit 300 includes a first amplifier 310, a first reference voltage source 311 (coupled between the positive input port of the first amplifier 310 and VSS), a first N-type metal oxide semiconductor (NMOS) transistor 312 (Its gate is coupled to the output terminal of the first amplifier 310 , its drain is coupled to VDD, and its source is coupled to the negative input port of the first amplifier 310 ). The dual output buffer circuit 300 additionally includes a second amplifier 320, a second reference voltage source 321 (coupled between the negative input port of the second amplifier 320 and VSS), a second N-type metal oxide semiconductor (NMOS) transistor 322 (its gate is coupled to the output terminal of the second amplifier 320 , its s...

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PUM

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Abstract

A dual-output buffer circuit for providing a first reference voltage and a second reference voltage has a first buffer circuit, a second buffer circuit, a first reference voltage coupled to the first buffer circuit, a second reference voltage coupled to the second buffer circuit, and a diode circuit coupled to a first output terminal of the first buffer circuit and a second output terminal of the second buffer circuit.

Description

technical field [0001] The invention relates to a snubber circuit, in particular to a low-power snubber circuit with current reuse. Background technique [0002] As more and more electronic products and related technologies adopt digital reception, processing and transmission communication methods, especially in the field of mobile communication and multimedia, analog-to-digital converters (analog-to-digital converters, ADC) and digital / The role of analog converters (digital-to-analog converters, DACs) in electronic products is also becoming more and more important. In order to quickly convert high-quality digital and analog signals, designers of ADCs and DACs often have to design products within expediency. They not only need to make a trade-off between quality and speed, but also must consider the power consumption and noise performance of the product And make concessions on product size. [0003] In ADC and DAC circuits, the buffer circuit is an important component wid...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/00H03M1/34H03M1/66H03K19/0185
CPCG05F1/56H03M1/002
Inventor 郑丁元
Owner RICHWAVE TECH CORP