Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Stack encapsulation method with grains reconfigured and stack construction thereof

A technology of reconfiguration and packaging methods, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., and can solve problems such as increasing the difficulty of cutting processes, damaging crystal grains, and increasing resistance values

Active Publication Date: 2009-06-10
CHIPMOS TECH INC
View PDF2 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The thinned grains are reconfigured on another substrate, and then a plurality of grains are formed into a package by injection molding; since the grains are very thin, the package is also very thin, so When the package is detached from the substrate, the stress of the package itself will cause the package to warp, increasing the difficulty of the subsequent cutting process
[0006] In addition, after the wafer is diced, when it is reconfigured on another substrate, because the size of the new substrate is larger than the original size, it will not be aligned in the subsequent ball planting process, and the reliability of the packaging structure will be reduced.
For this reason, the present invention provides a method to form an alignment mark (alignment mark) on the back of the wafer before wafer dicing, which can effectively solve the problems of inability to align and package warpage during ball planting.
[0007] In addition, during the entire packaging process, there will be a problem that when the ball is planted, the manufacturing equipment will exert local excessive pressure on the die, which may damage the die; at the same time, it may also be caused by the material of the ball. The resistance value between the pads on the pad becomes larger, which affects the performance of the grain and other issues

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Stack encapsulation method with grains reconfigured and stack construction thereof
  • Stack encapsulation method with grains reconfigured and stack construction thereof
  • Stack encapsulation method with grains reconfigured and stack construction thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The direction of the present invention discussed here is a packaging method for reconfiguration of dies, a method of reconfiguring a plurality of dies on another substrate and then packaging them. In order to provide a thorough understanding of the present invention, detailed steps and components thereof will be set forth in the following description. Obviously, the practice of the invention is not limited to the specific details of the manner in which the die are stacked, with which those skilled in the art are familiar. On the other hand, well-known chip formation methods and detailed steps of back-end processes such as chip thinning are not described in detail to avoid unnecessary limitations of the present invention. However, for the preferred embodiments of the present invention, it will be described in detail as follows, but in addition to these detailed descriptions, the present invention can also be widely implemented in other embodiments, and the scope of the p...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to an encapsulation structure for reconfiguring crystal grains. The encapsulation structure comprises a crystal grain, an encapsulating body, a plurality of conduction columns, a plurality of patternized metal wire sections, a patternized protective layer and a plurality of conduction elements, wherein the active surface of the crystal grain is provided with a plurality of welding pads; the encapsulating body covers the crystal grain and exposes the plurality of the welding pads on the crystal grain; the plurality of the conduction columns run through the encapsulating body to form a first conduction end and a second conduction end at two ends respectively; the plurality of the welding pads of the crystal grain are in electric connection with each first conduction end of the plurality of the conduction columns through each patternized metal wire section; the patternized protective layer is used for covering the plurality of the welding pads of each crystal grain and the plurality of the patternized metal wire sections and exposes one surface outwards extended from part of the plurality of the patternized metal wire sections; and the plurality of the conduction elements are in electric connection with the exposed surface outwards extended from part of the patternized metal wire sections.

Description

technical field [0001] The present invention relates to a method for reconfiguring crystal grains, in particular to forming conductive pillars in the package body of the crystal grains as conductive terminals for electrically connecting a plurality of packaged and independent crystal grains Encapsulation method for stacking. Background technique [0002] Semiconductor technology has developed quite rapidly, so the miniaturized semiconductor die (Dice) must have diversified functional requirements, so that the semiconductor die must be configured with more input / output pads ( I / O pads), so that the density of metal pins (pins) has also increased rapidly. Therefore, the early lead frame packaging technology is no longer suitable for high-density metal pins; therefore, a ball array (Ball Grid Array: BGA) packaging technology has been developed. The ball array package has the advantage of higher density than the lead frame package. In addition, its solder balls are less prone ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/50H01L21/60H01L21/56H01L23/485H01L23/31H01L25/00
CPCH01L2924/01079H01L2924/3511H01L2924/01078H01L2924/15311H01L24/20H01L2924/01082H01L24/96H01L2224/12105H01L2924/01023H01L24/19H01L2221/68359H01L2924/01068H01L2224/04105H01L2924/15331H01L2224/20H01L2224/92H01L2924/01094H01L21/6835H01L2924/01033H01L21/568H01L2224/0401H01L2224/19H01L2225/1035H01L2225/1058H01L2924/1815
Inventor 王钟鸿
Owner CHIPMOS TECH INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products