Transistor encapsulation method and construction, jumper wire board for tester table

Abstract

Disclosed is a packaging method for transistors, the steps of the method comprise placing a testing structure of a transistor on a bearing plate, utilizing a first metal wire to connect a source bonding pad of the testing structure and a first pin of the bearing plate, wherein the first pin is located between two pressurizing pins, utilizing a second metal wire to connect a first bonding pad of the testing structure and a second pin of the bearing plate, wherein the second pin is a pressurizing pin located between two pressurizing pins, utilizing a third metal wire to connect a second bondingpad of the testing structure and a third pin of the bearing plate, wherein the third pin is a pressurizing pin, and the third metal wire and the first metal wire are located on an identical side of the testing structure but are not crossed, and utilizing a fourth metal wire to connect a third bonding pad of the testing structure and a fourth pin of the bearing plate, wherein the fourth pin is a pressurizing pin, and the fourth metal wire and the second metal wire are located on an identical side of the testing structure but are not crossed. The packaging method can be applied to reduce types of packaging structures of transistors, and simplifies preparation work before testing.

Description

technical field [0001] The invention relates to packaging technology, in particular to a transistor packaging method and structure used for packaging-level reliability testing, and a jumper board used for testing machines. Background technique [0002] Reliability testing (Reliability) can be simply described as the service life (Lifetime) of a product that can work smoothly under normal conditions of use. Reliability testing of semiconductor devices (such as MOS devices) is an important part of the manufacturing process of semiconductor integrated circuits part. In order to measure the reliability of semiconductor devices in a short period of time, accelerated test experiments are usually used, that is, stress conditions (stress, which refers to ambient temperature and humidity higher than normal working conditions) are applied to semiconductor devices to accelerate their performance degradation. , voltage, current, pressure, etc.), measure its performance parameters, and ...

AI Technical Summary

Problems solved by technology

Therefore, the preparatory work before testing a variety of different transistor packaging structures will be cumbersome. It is necessary to select the machine to be used first, and the preparatory work before using machine B will require frequent replacement of jumper boards. more cumbersome jumpers

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