Conductive wire frame strip, glue sealing method and glue sealing structure thereof

A lead frame strip and lead frame technology, which is applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of wasting the space of the lead frame strip 1, and it is difficult to further increase the output per unit time, etc.

Active Publication Date: 2011-03-30
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the 1:1 arrangement ratio design of the flow channel support 12 and the lead frame unit 13 has too many flow channel support 12, which relatively limits the space that the lead frame bar 1 can be used to set the lead frame unit 13. Space, that is to say relatively limit the total number of units of the lead frame unit 13
As a result, only a limited amount of the encapsulant 173 can be formed on the lead frame bar 1 every time the encapsulation process is performed, and a lot of space of the lead frame bar 1 must be wasted, thus making it difficult to further improve the lead frame bar 1. Output per unit time (units per hour, UPH) of the above-mentioned sealing procedure

Method used

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  • Conductive wire frame strip, glue sealing method and glue sealing structure thereof
  • Conductive wire frame strip, glue sealing method and glue sealing structure thereof
  • Conductive wire frame strip, glue sealing method and glue sealing structure thereof

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Embodiment Construction

[0024] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the preferred embodiments of the present invention will be specifically cited below, together with the accompanying drawings, for a detailed description as follows:

[0025] Please refer to Figure 2A , 2BAs shown in and 2C, the lead frame bar and its sealing method and sealing structure of the preferred embodiment of the present invention are mainly used in the manufacture of semiconductor packaging products with four rows of lead frames, for example, in the manufacture of square flat packages (quad flat package, QFP), square flat non-leaded package (quad flat non-leaded package, QFN) or other similar packaging products, but can also be used to manufacture semiconductor packaging products with double-row lead frames, such as Small Outline Package (SOP), Small Outline J-Lead Package (SOJ), Small Outline Transistor Package (SOT), Small Outline...

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Abstract

The invention discloses a leadframe strip and a seal adhesive method and a seal adhesive structure thereof mainly providing the leadframe strip including at least a channel branch module having four leadframe units, a shunt point reserved zone and four side gate reserved zones. The four leadframe units are mutually adjacently arranged as a matrix shape. The shunt point reserved zone and the four side gate reserved zones are located in a central region surrounded by the four leadframe units. The shunt point reserved zone and an angle position nearest the central zone of each leadframe unit. Thus the leadframe strip can improve the space utilization rate of the leadframe and relatively increase the number of the leadframe units.

Description

【Technical field】 [0001] The present invention relates to a lead frame strip and its sealing method and sealing structure, in particular to a lead frame strip capable of increasing the output per unit time (units per hour, UPH) and its sealing method and structure. Sealing structure. 【Background technique】 [0002] Nowadays, in order to meet various packaging requirements, the semiconductor packaging industry has gradually developed various types of packaging structures. Among them, silicon chips (chips) cut from semiconductor silicon wafers (wafers) are usually firstly processed by wire bonding. ) or bumping (bumping) and other appropriate methods to select and fix on the leadframe (leadframe) or substrate (substrate), and then use the encapsulation gel to encapsulate and protect the silicon chip, so that the basic structure of a semiconductor package structure can be completed. Common package structures with lead frames include small outline package (SOP), small outline J...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/495H01L21/56H01L23/31
CPCH01L2224/49171H01L2924/10253H01L2224/48247H01L24/97H01L2924/181
Inventor 陈天赐陈光雄徐志宏陈焕文谢玫璘邱世杰林英士张树明陈锺国徐鸣懋
Owner ADVANCED SEMICON ENG INC
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