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Implant at shallow trench isolation corner

A technology for isolating trenches and regions, used in electrical components, circuits, semiconductor/solid-state device manufacturing, etc., to reduce surface dark current

Inactive Publication Date: 2009-08-19
OMNIVISION TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, subsequent etching in the fabrication process creates unwanted silicon pits at the corner implants of the STI

Method used

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  • Implant at shallow trench isolation corner
  • Implant at shallow trench isolation corner
  • Implant at shallow trench isolation corner

Examples

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Embodiment Construction

[0022] The present invention includes a method of forming a corner implant in an STI region of an integrated circuit. The implant is self-aligned to the STI corners without the need for additional photoresist that masks or exposes the STI corners, which would result in silicon pits. The invention is described with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. However, this invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to fully convey the concept of the invention to those skilled in the art. The figures are not drawn to scale and many parts are exaggerated for clarity.

[0023] refer to figure 2 , shows a cross-sectional view of a semiconductor substrate and a first hard mask layer in an embodiment according to the present invention. In one embodiment according to the invention, semiconductor substrate 20...

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Abstract

A method for fabricating corner implants in the shallow trench isolation regions of an image sensor includes the steps of forming a photoresist layer on a first hard mask layer overlying an etch-stop layer on a semiconductor substrate. The photoresist mask is patterned to create an opening and the portion of the first hard mask layer exposed in the opening is etched down to the etch-stop layer. A first dopant is implanted into the semiconductor substrate through the exposed etch-stop layer. The photoresist mask is removed and a second hard mask layer is formed on the remaining structure and etched to create sidewall spacers along the side edges of the first hard mask layer. The etch stop layer and the semiconductor substrate positioned between the sidewall spacers are etched to create a trench and a second dopant implanted into the side and bottom walls of the trench.

Description

technical field [0001] The present invention generally relates to methods of fabricating integrated circuits in semiconductor devices. More particularly, the present invention relates to fabricating implants at shallow trench isolation corners of image sensors to suppress surface dark current. Background technique [0002] Typically, metal or lattice defects, surface states, and lattice stresses generate dark current in image sensors. Dark current is an unwanted signal that is generated in a semiconductor substrate and collected by a photodetector. Dark current is generated both when light is shining on the photodetector and when it is not. Dark current increases noise, which reduces the image sensor's dynamic range and signal-to-noise ratio. [0003] Shallow trench isolation physically isolates the pixels so that the signal collected in any given pixel will not spill over to an adjacent pixel or multiple adjacent pixels. Unfortunately, STI features can potentially gener...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
Inventor H·Q·董E·G·斯蒂芬斯
Owner OMNIVISION TECH INC
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