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A metallization layer stack without a terminal aluminum metal layer

A technology of metallization layer and bottom metal, applied in semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve problems such as yield loss

Inactive Publication Date: 2009-11-18
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, aluminum corrosion and / or polyimide delamination can significantly lead to yield loss in the manufacturing sequence described above

Method used

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  • A metallization layer stack without a terminal aluminum metal layer
  • A metallization layer stack without a terminal aluminum metal layer
  • A metallization layer stack without a terminal aluminum metal layer

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Embodiment Construction

[0025] Various exemplary embodiments of the present invention are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. Of course, it should be appreciated that in developing any such actual embodiment, many implementation-specific decisions must be made to achieve the developer's specific goals, such as meeting specific system-related and business-related goals, which will vary with the implementation. changed. In addition, it should be understood that such developing effects might be complex and time consuming, but would nevertheless be a routine undertaking for those skilled in the art having the benefit of this disclosure.

[0026] The invention will now be described with reference to the accompanying drawings. Various structures, systems and devices are schematically drawn in the drawings for purposes of illustration only and not to obscure the present invention with details that are well known to ...

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Abstract

By directly forming an underbump metallization layer (211) on a contact region (202A) of the last metallization layer, the formation of any other terminal metals, such as aluminum and corresponding adhesion / barrier layers, may be avoided. Consequently, the thermal and electrical behavior of the resulting bump structure (212) may be improved, while process complexity may be significantly reduced.

Description

technical field [0001] The present invention relates generally to the formation of integrated circuits, and more particularly to a fabrication process for forming a metallization stack including bumps for connection to a suitably formed package or carrier substrate Structure (bump structure). Background technique [0002] In the manufacture of integrated circuits, it is usually necessary to package the chip and provide leads and terminals for connecting the chip system with the surroundings. In some packaging techniques, a chip, chip package, or other suitable unit may be passed through solder balls formed on a corresponding layer (which will be referred to herein as the final contact layer) of at least one of the units. ball) (formed by so-called solder bumps), for example on a dielectric passivation layer of a microelectronic chip. In order to connect the microelectronic chip with the corresponding carrier, the surfaces of the two individual components to be connected (t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/485H01L21/60
CPCH01L2924/01023H01L2924/0105H01L2924/01082H01L2924/01004H01L2224/0554H01L2924/01018H01L2924/30105H01L2924/01019H01L2924/01322H01L2924/01029H01L2224/13099H01L2924/01022H01L2224/0401H01L2224/05001H01L2924/01028H01L2224/1147H01L24/11H01L2924/014H01L2924/01013H01L2924/01024H01L24/03H01L24/13H01L2924/19043H01L2924/04941H01L2924/01047H01L2924/05042H01L2924/04953H01L2924/01007H01L24/05H01L2924/14H01L2924/01033H01L2924/01074H01L2924/01078H01L2924/01014H01L2924/01073H01L2224/131H01L2924/01075H01L2224/05H01L2924/15788H01L2924/00014H01L2924/00
Inventor M·莱尔F·屈兴迈斯特L·莱曼M·威兰A·普拉茨A·沃尔特G·容尼克尔
Owner GLOBALFOUNDRIES INC