Fault-tolerant method of storage module of picosatellite based on FPGA

Abstract

The invention discloses a fault-tolerant method of a storage module of a picosatellite based on FPGA. The fault-tolerant method comprises the following steps: a data bus divides data needing to be written into high-order data and low-order data, which are respectively transmitted to two same Hamming coding modules for processing the high-order data and low-order data so as to generate redundant data correspondingly; data and corresponding redundant data are respectively stored into three sectors in a static memory, and data in different sectors of same static memory is read when in reading data; comparison operation of '2 out of 3' is carried out according to bits so as to obtain read data which is transmitted to the corresponding Hamming coding modules; and the two Hamming coding modules respectively carry out comparison and correction to data and then output the data to a central processor. The method can lead the storage memory to realize 'SEC-DED', guarantee correct storage of check code, simultaneously adapt to important characteristics of light weight, small volume, low cost and short researching period well.

Description

technical field [0001] The invention relates to the technical field of pico-satellite on-board computer, in particular to improvement of data reliability of storage module of pico-satellite on-board computer. Background technique [0002] The impact of space single event effects on the on-board computer system cannot be ignored. Even a small logic error may paralyze the on-board computer and cause the satellite to lose control. In general, the reliability of computer systems can be improved through fault-avoidance design and fault-tolerant design. For kilogram-level pico-satellites, they are characterized by light weight, small size, low cost, and short development cycle. Moreover, the demand for aerospace-grade electronic devices is relatively small, so that the cost of radiation-resistant devices is very high, and the price is very expensive. In the actual development process, a large number of commercial-grade electronic devices that are easy to obtain on the market are ...

AI Technical Summary

Problems solved by technology

[0003] However, in the prior art, the check code generated during the execution of error-correcting and error-detecting coding (EDAC) does not take security measures to prevent errors in the check code, and if the check code is reversed or other errors occur, even if the original data is correct, it will be blocked. Think "wrong", that will also be a very fatal problem

Another problem is that the error-correction and error-detection coding (EDAC) chips used on satellites at this stage require more complex peripheral circuits, which will increase a lot in terms of power consumption and volume.

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