Protection sealing ring used for preventing stress caused by cutting die

Abstract

The invention provides a semiconductor chip, comprising a semiconductor substrate; a plurality of low-k dielectric layers above the semiconductor substrate; a first passivation layer above a plurality of the low-k dielectric layers; and a second passivation layer above the first passivation layer. A first sealing ring is adjacent to an edge of the semiconductor chip, and the first sealing ring has an upper surface that is basically parallel and level with a bottom surface of the first passivation layer. The second sealing ring is adjacent to the first sealing ring and located at the inner side of the semiconductor chip. The second sealing ring comprises a bonding pad ring in the first passivation layer and the second passivation layer. A groove ring comprises at least a part that is directly formed above the first sealing ring, and extended downwards from a top surface of the second passivation layer at least to an interface between the first passivation layer and the second passivation layer.

Description

technical field [0001] The present invention relates to an integrated circuit, and more specifically, to a structure and a forming method of a sealing ring. Background technique [0002] Seal ring formation is an important part of the semiconductor back-end process. A seal ring is a stress protection structure surrounding an integrated circuit that protects internal circuitry within a semiconductor chip from damage caused by dicing a wafer into semiconductor chips. [0003] A typical seal ring is usually formed of interconnected metal lines and connecting vias. figure 1 is a schematic diagram of a portion of the seal ring 10 formed on the inner side of a scribe line (or called a scribe groove) 12 , which is sometimes also referred to as a dicing line 12 . Typically, there is a circuit area (not shown) on the left hand side of the drawing. [0004] Seal ring 10 includes interconnected metal elements formed from metal lines 14 and conductive vias 18 each formed in dielectri...

AI Technical Summary

Problems solved by technology

Second, continuous via bars typically have a width that is substantially less than the thickness of each overlying metal line, and thus do not have sufficient strength to prevent crack propagation during die sawing.

Third, cracks may propagate through the interface 22 between the passivation film 20 and the underlying layer into the circuit area

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