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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, which can be used in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., and can solve problems such as performance deterioration of semiconductor devices

Inactive Publication Date: 2010-02-24
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This phenomenon is known as the reverse narrow channel effect, which can degrade the performance of semiconductor devices

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0045] figure 1 is a cross-sectional view schematically describing the structure of the semiconductor device of Embodiment 1 of the present invention. refer to figure 1 For example, an element isolation structure STI based on a field shield STI is formed in the main surface of the semiconductor substrate SB made of silicon. Each element isolation structure STI has a trench TR, a first oxide film T01a, an embedded conductive film BC, a second oxide film T01b, and a third oxide film T02.

[0046] Trench TR is formed in the main surface of semiconductor substrate SB. The first oxide film T01a is formed to cover the wall surface of the trench TR. For example, the first oxide film T01a is a silicon oxide film formed by thermally oxidizing the surface of the semiconductor substrate SB in an atmosphere containing an active oxidizing species.

[0047] The embedded conductive film BC is embedded in the trench TR whose wall surface is covered with the first oxide film T01a and is,...

Embodiment 2

[0096] Figure 18 is a cross-sectional view schematically showing the structure of a semiconductor device according to Embodiment 2 of the present invention. refer to Figure 18 , the structure of the semiconductor device of this embodiment is the same as figure 1 The semiconductor device of Embodiment 1 shown is mainly different in the structure of the insulating film T04 on the embedded conductive film BC in each element isolation structure STI.

[0097] This insulating film T04 is, for example, a silicon oxide film, and is selectively formed on the embedded conductive film BC. The insulating film T04 has tensile stress and is further formed to provide tensile stress to the semiconductor substrate SB. In addition, in each structure STI, the insulating film T04 is joined to the silicon oxide film T03 formed on the wall surface on the trench TR. In order that the insulating film T04 is not removed by etching or the like in a subsequent step, the film thickness of the insu...

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Abstract

Provided are a semiconductor device making it possible to form an element region having a dimension close to a designed dimension, restrain a phenomenon similar to gate-induced drain leakage, and further restrain compressive stress to be applied to the element region by oxidation of a conductive film; and a method for manufacturing the semiconductor device. Trenches are made in a main surface of asemiconductor substrate. By oxidizing the wall surface of each of the trenches, a first oxide film is formed on the wall surface. An embedded conductive film is formed to be embedded into the trench.The embedded conductive film is oxidized in an atmosphere containing an active oxidizing species, thereby forming a second oxide film. A third oxide film is formed on the second oxide film by CVD orcoating method.

Description

[0001] Cross References to Related Applications [0002] Japanese Patent Application No. 2008-211738 filed on Aug. 20, 2008 including specification, drawings and abstract is incorporated by reference in this specification in its entirety. technical field [0003] The present invention relates to a semiconductor device and a method of manufacturing the same. Background technique [0004] As semiconductor integrated circuits have rapidly become smaller in recent years, their densities have become greater. Following this phenomenon, in integrated circuits using the most advanced technology, their element isolation areas have been required to be made smaller, while their element isolation capabilities have been maintained, thereby increasing the degree of integration per unit area. [0005] In response to the requirement that the device isolation region should be made smaller, the trench isolation method has been widely used as a device isolation method, thereby replacing the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/765H01L21/316H01L27/04
CPCH01L21/763H01L21/76224H01L29/7846
Inventor 石桥真人堀田胜之山下朋弘角村贵昭黑井隆
Owner RENESAS ELECTRONICS CORP
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