Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Bonding welding disk lowering parasitic capacitance and preparing method thereof

A technology for bonding pads and pads, applied in circuits, electrical components, electrical solid devices, etc., can solve problems such as pad metal layer peeling

Active Publication Date: 2010-02-24
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF0 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the pad metal layer is only attached to the dielectric and is subjected to external pressure and tension from the bonding wire, the pad metal layer may peel off (peeling-off)

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Bonding welding disk lowering parasitic capacitance and preparing method thereof
  • Bonding welding disk lowering parasitic capacitance and preparing method thereof
  • Bonding welding disk lowering parasitic capacitance and preparing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0043] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings.

[0044] figure 2 Shown is a schematic diagram of the structure of the bonding pad provided by the present invention. The direction perpendicular to the surface layer on the semiconductor substrate is defined as the Z direction, and the plane parallel to the surface layer on the semiconductor substrate is defined as the XY plane. The bonding pad includes the semiconductor substrate 50 and the pad metal layer 60. The semiconductor substrate includes a semiconductor substrate (not shown in the figure) in the active device area and a semiconductor substrate 50 in the bonding pad area. The upper surface layer of the semiconductor substrate 50 is doped with semiconductors to form a first semiconductor Doped well region 51, in the first semiconductor doped well region 51...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention discloses a bonding welding disk lowering parasitic capacitance and a preparing method thereof, belonging to the technical field of manufacturing semiconductors. The bonding welding diskprovided by the invention comprises a welding disk metal layer, a fist semiconductor doping well region, a second semiconductor doping zone and a first semiconductor high-doping zone, wherein, the fist semiconductor doping well region is formed by doping the semiconductor, the second semiconductor doping zone is formed in the fist semiconductor doping well region, and the first semiconductor high-doping zone is formed on the upper surface layer of the second semiconductor doping zone; junction capacitance formed between the first semiconductor doping well region and the second semiconductor doping zone, the junction capacitance formed between the second semiconductor doping zone and the first semiconductor high-doping zone and the junction capacitance formed between the first semiconductor doping well region and the semiconductor substrate are connected in series to lower the equivalent parasitic capacitance value of the bonding welding disk; meanwhile, the second semiconductor dopingzone has simple preparing method and increases little cost of the preparing technology of the bonding welding disk.

Description

Technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a bonding pad capable of reducing parasitic capacitance and a preparation method thereof. Background technique [0002] In the field of semiconductor manufacturing technology, the electrical connection between the internal circuit and the external signal is completed through the bonding pad (Bond-Pad). If the pad metal layer is only attached to the dielectric and receives external pressure and tension from the bonding wire, the pad metal layer may have a peeling-off phenomenon. In order to avoid the occurrence of this peeling phenomenon, it is necessary to use the contact between the connecting pad metal layer and the substrate to tie the pad metal layer, so the substrate and the pad metal layer are electrically connected. [0003] There is a junction capacitance between the semiconductor substrate of the bonding pad and the semiconductor doped well region. Because ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/482H01L29/06H01L21/60
CPCH01L2224/16145
Inventor 黎坡张拥华周建华彭树根
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products