Cache simulator based on GPU and time parallel speedup simulating method thereof

Abstract

The invention provides a Cache simulator based on a GPU and a time parallel speedup simulating method thereof. The Cache simulator comprises an initializing module, a Trace segmentation module, a GPU parallel simulating module, a GPU parallel modifying module and a statistical calculation module. The cache simulator is based on the GPU with strong high-performance parallel computing capacity, hasmulti granularity and multi configuration abilities and parallel simulation characteristic. The invention adopts a time parallel speedup method to segment longer Trace arrays, realizes the parallel simulation of multi Trace segments on the GPU, and utilizes the GPU parallel modifying module to modify the error caused by the modifying and simulating processes in the simulating process. The invention has the advantages that the Cache simulating efficiency is improved, computing resources are better utilized and simultaneously higher cost-performance ratio is achieved.

Description

technical field [0001] The invention relates to a Cache simulator and an acceleration simulation method thereof, in particular to a GPU-based Trace-driven Cache simulator and a time parallel acceleration simulation method thereof, belonging to the field of computer architecture and parallel computing. Background technique [0002] Cache (high-speed cache memory) technology effectively narrows the speed gap between the processor and the memory, and greatly improves the performance of the computer system. Therefore, the design of the modern processor is usually accompanied by the Cache design. However, due to the constraints of design cost and time-to-market, it is difficult for designers to comprehensively evaluate the performance of different Cache structures in hardware during the processor development stage. Therefore, designers usually need to use software methods to evaluate the performance of different Cache structures. [0003] The simulator is divided into a hardware ...

AI Technical Summary

Problems solved by technology

At present, in terms of time parallel simulation, German scholar Kiesling uses a finite approximation method to correct the cache simulation on the basis of the time slicing algorithm, but the real simulation results are different from the real results, which cannot reflect the actual cache performance well.

[0009] The above methods have their own limitations, such as unsatisfactory acceleration effect, high cost, or inflexibility

No simulation method can simultaneously meet the requirements of correctness, practicality, cost, speed-up effect, flexibility, etc.

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