RSA (Rivest-Shamirh-Adleman) algorithm and IP core

Abstract

The invention discloses an RSA (Rivest-Shamirh-Adleman) algorithm and an IP core, relating to the technical field of electronic information encryption and aiming to solve the technical problems of overlarge IP core area and lower computing speed of the RAS algorithm. The IP core for operating the RAS algorithm comprises an interface module, a control module, a memory module, a modular exponentiation module and a modular reduction module, wherein the control module is respectively connected with the modular reduction module, the memory module, the modular exponentiation module and the interface module; the modular reduction module is respectively connected with the modular exponentiation module and the memory module; and the memory module is respectively connected with the modular exponentiation module and the interface module. The invention has the characteristics of emphasis on small area, high performance, lowend-oriented RAS IP core, adoption of advanced encryption algorithms and proper hardware structures and demand on less addition and storage space.

Description

technical field [0001] The invention relates to electronic information encryption technology, in particular to an electronic technology of an RSA algorithm and its IP core. Background technique [0002] With the rapid development of information technology, the issues of identity authentication and information security transmission in network communication are gradually attracting people's attention and attention. Since the public key cryptosystem can effectively solve digital signature, information verification and identity authentication, various countries have invested a lot of manpower and material resources in this area of ​​research. The RSA (Rivest-Shamir-Adleman) encryption algorithm has become a widely accepted and implemented general-purpose public key encryption method since its birth. [0003] Encryption algorithms can be implemented in software, or converted into hardware-implemented ASIC (application-specific integrated circuit) chips, and hardware encryption i...

AI Technical Summary

Problems solved by technology

It is extremely important to implement the RSA cryptographic coprocessor of the public key cryptosystem in these small mobile devices, but there are two main problems at present: one is that the VLSI (Very Large Scale Integrated Circuit) of RSA realizes too large an area, and the other is that RSA's modular exponentiation operation speed is low

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