Microprocessor and execution method thereof

A technology of microprocessors and execution units, applied in the field of non-sequential microprocessors, which can solve problems such as adverse effects of branch instructions
CN101866280AActive Publication Date: 2010-10-20VIA TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
VIA TECH INC
Publication Date
2010-10-20

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Abstract

A microprocessor and an execution method thereof are used for pipelined out-of-order execution in-order retire. The microprocessor includes a branch predictor that predicts a target address of a branch instruction, a fetch unit that fetches instructions at the predicted target address, and an execution unit that: resolves a target address of the branch instruction and detects that the predicted and resolved target addresses are different; determines whether there is an unretired instruction that must be corrected and that is older in program order than the branch instruction, in response to detecting that the predicted and resolved target addresses are different; execute the branch instruction by flushing instructions fetched at the predicted target address and causing the fetch unit to fetch from the resolved target address, if there is not an unretired instruction that must be corrected and that is older in program order than the branch instruction; and otherwise, refrain from executing the branch instruction.
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Description

technical field

[0001] The invention relates to the field of non-sequentially executed microprocessors, in particular to the execution of branch instructions thereof. Background technique

[0002] Superscalar microprocessors have multiple execution units for executing the instruction set of the microprocessor. A superscalar microprocessor improves processing performance through multiple execution units, so a superscalar microprocessor can execute multiple instructions simultaneously in each clock cycle. The key to the potential performance improvement of a superscalar microprocessor is that instructions must be continuously supplied to the execution units for execution; otherwise, the performance of a superscalar microprocessor will not be better than that of a scalar microprocessor, and A superscalar microprocessor will cost more hardware than a scalar microprocessor. For example, the execution unit is used to load and store instruction operands, calculate addresses, exec...

Claims

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