Method for reducing power consumption based on dynamic task migrating technology in multi-GPU (Graphic Processing Unit) system

A dynamic task and technology technology, applied in the computer field, can solve problems such as limited threads, energy consumption, GPU computing unit idleness, etc., and achieve the effects of reducing power consumption, saving energy consumption, and good effectiveness

Inactive Publication Date: 2010-12-01
SHANGHAI JIAO TONG UNIV
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Problems solved by technology

However, the above three technologies do not take into account that if the computing resources greatly exceed the computing requirements, for example, the threads that can perform parall

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  • Method for reducing power consumption based on dynamic task migrating technology in multi-GPU (Graphic Processing Unit) system
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  • Method for reducing power consumption based on dynamic task migrating technology in multi-GPU (Graphic Processing Unit) system

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Embodiment

[0028] In this embodiment, the system uses the NVIDIA Tesla S2050 1U computing system code-named "Fermi" architecture. The system has 4 GPUs, and each GPU can achieve a maximum of 515 Gigaflop (gigaflops per second) double-precision peak performance , so that the double-precision performance of 2 Teraflops and 900W thermal design power consumption can be realized in 1U space. The specific power reduction includes the following steps:

[0029] The first step is to set a GPU utilization monitor on each GPU to monitor the number N1 of double-precision floating-point operations performed by all SPs on the GPU within the time T, and obtain the average utilization of each GPU within the T time μ=N1 / N2.

[0030] In this embodiment, N1 is the number of double-precision floating-point operations performed within the time T, N2 is the theoretical peak number of 515 million double-precision floating-point operations performed by each GPU within the time T, and T is 1 microsecond.

[00...

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Abstract

The invention relates to a method for reducing power consumption based on a dynamic task migrating technology in a multi-GPU (Graphic Processing Unit) system in the technical field of computers, which comprises the following steps of: respectively mounting a GPU utilization ratio monitor on each GPU to obtain an average utilization ratio of each GPU in T time; when the utilization ratio of the i GPU is R1, migrating all tasks on the i GPU on the GPU the utilization ratio of which is R2 and shutting down the GPU; when the utilization ratio of the j GPU is 100 percent, migrating part of tasks on the j GPU on the GPU the utilization ratio of which is R3; when the utilization ratio of all running GPUs exceeds a threshold value R4, and a system is provided with the shutdown GPU, automatically starting a shutdown GPU by the system and allocating a new calculating task to the just started GPU; and continuously repeating the steps till all the GPUs are used for running a program. The invention has the function of monitoring a real-time source utilization ratio and can effectively reduce the power consumption of the GPUs and optimize the communication among the GPUs.

Description

technical field [0001] The present invention relates to a method in the field of computer technology, in particular to a method for reducing power consumption based on dynamic task migration technology in a multi-GPU (Graphic Processing Unit, image processing unit) system. Background technique [0002] In recent years, GPU has been developed at a high speed, which is very suitable for large-scale high-performance parallel numerical calculation with high efficiency and low cost. GPU is a concept derived from the CPU (Central Processing Unit). It is a key part of the graphics card. It constitutes a subsystem by exclusively occupying the onboard memory of the graphics card or sharing the CPU memory, and becomes the key to the graphics processing performance of the PC system. More and more graphics applications in modern computers make the status of GPU more and more important. This kind of chip has risen rapidly in recent years after the CPU dominated PC performance for decades...

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Application Information

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IPC IPC(8): G06F1/32G06F9/50
CPCY02B60/142Y02B60/167Y02D10/00
Inventor 过敏意马曦朱寅郑龙沈耀周憬宇曹朋
Owner SHANGHAI JIAO TONG UNIV
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