Method for fabricating integrated circuit

Abstract

A method for fabricating an integrated circuit with improved performance is disclosed. The method comprises providing a substrate; forming a hard mask layer over the substrate; forming a photoresistance layer on the hard mask layer; patterning the photoresistance layer on the hard mask layer so as to limit a plurality of protected portions and a plurality of unprotected portions on the hard mask layer; performing a first etching process, a second etching process, and a third etching process on the unprotected portions of the hard mask layer, wherein the first etching process partially removes the unprotected portions of the hard mask layer, the second etching process corrects etching selectivity of the other unprotected portions compared with the protected portions of the hard mask layer, and the third etching process removes the remaining unprotected portions of the hard mask layer; and performing a fourth etching process to remove the protected portions of the hard mask layer.

Description

technical field [0001] The invention relates to a manufacturing method of an integrated circuit. In particular, the present invention relates to a method of manufacturing an integrated circuit capable of improving etching selectivity. Background technique [0002] The semiconductor integrated circuit manufacturing industry has experienced rapid growth. In the evolution of integrated circuits, when the geometric size (that is, the smallest component or line width that can be made using a process) has decreased, the functional density (Functional Density; that is, the number of interconnected components per chip area) has generally increased. number). This scaling down process generally provides benefits by increasing production efficiency and reducing associated costs. This shrinking process has also resulted in the adoption of high dielectric constant layers and conductive layers (eg, metal layers) to form various integrated circuit components (eg, Metal-Oxide-Semiconduct...

AI Technical Summary

Problems solved by technology

However, it has been observed that: the dry etching process causes damage to the high dielectric constant layer and the conductive layer, and sometimes leaves photoresist (photoresist) residue; the wet etching process often causes lateral etching (Lateral Etching), Reduce the quality of patterned outlines

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