Shuffle switch matrix compression method based on mode shift

A compression method and switch matrix technology, applied in the direction of program control design, instrument, electrical digital data processing, etc., can solve the problems of low compression rate of the switch matrix of shuffling instructions, no consideration of shuffling request mode offset relationship, etc., to achieve The effect of reduced number, less hardware complexity, and smaller data volume

Active Publication Date: 2013-01-16
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

[0008] The switch matrix compression method of the minimum data granularity index method is widely used in current vector processors, but this method does not consider the mode offset relationship between different shuffling requests in an application. For the shuffling mode The shuffling patterns of the shuffling requests with offset relationship are stored separately, resulting in a low compression rate of the switching matrix of the shuffling instructions of the entire application

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  • Shuffle switch matrix compression method based on mode shift
  • Shuffle switch matrix compression method based on mode shift
  • Shuffle switch matrix compression method based on mode shift

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Embodiment Construction

[0042] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0043] Such as figure 2 As shown, it is a schematic flow chart of the method for compressing the shuffled switch matrix based on mode shifting in the present invention. The biggest difference between the method proposed by the present invention and the traditional method is that when adding the compressed shuffling pattern of the switch matrix of the current shuffling request to the shuffling pattern table, it is judged whether the current shuffling pattern and the entry in the shuffling pattern table are There is a pattern shift relationship, but the traditional method does not make the above judgment.

[0044] In the preprocessing stage of the program, the present invention sets a shuffling pattern table, first compresses each shuffling request according to the minimum data granularity index method, and then compresses the compres...

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Abstract

The invention provides a shuffle switch matrix compression method based on mode shift, which comprises the following steps: 1, presetting an SF_Table as the table for storing a shuffle mode, setting data granularity for a current shuffle request to be the minimum data granularity supported by a crossbar switch, and compressing according to the current granularity index method; 2, judging whether mode shift relation exists between the compressed shuffle mode for the current shuffle request and a certain table entry in the shuffle mode table; if yes, jumping to step 3, otherwise, jumping to step 4; 3, keeping the shuffle mode table unchanged, adding corresponding shuffle mode address information and relative shift information to a current shuffle command, and then processing the next shuffle request; and 4, adding the current shuffle mode to the shuffle mode table, adding corresponding shuffle mode address information and relative shift information to the current shuffle command, and processing the next shuffle request. The shuffle switch matrix compression method is simple, is convenient to operate and has the advantages of wide application range, improved compression efficiency and the like.

Description

technical field [0001] The present invention mainly relates to the field of general-purpose processors or digital signal processors (Digital Signal Processor, DSP) using Single Instruction Stream Multiple Data streams (Single Instruction stream Multiple Data streams, SIMD) technology, and specifically refers to a The shuffled switch matrix compression method. Background technique [0002] SIMD technology, represented by subword parallel and vector technology, has great advantages in solving data-intensive applications such as media processing and wireless communication, so it has been widely used and developed, and is favored by processors, especially DSP. . The shuffling unit is mainly responsible for the data interaction between the registers of each processing unit of the SIMD component, and is a key component that restricts the performance of parallel processing units. [0003] The hardware main structure of the shuffling unit generally has the following three methods,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/30G06F9/315
Inventor 陈海燕刘胜陈书明万江华刘衡竹陈跃跃刘仲张凯刘祥远李振涛
Owner NAT UNIV OF DEFENSE TECH
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