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Process for manufacturing whole gold-plated board

A technology of manufacturing process and gold-plated area, which is applied in the field of manufacturing process of full-plate gold-plated plate, and can solve the problems of poor gold-plated quality, collapse of gold-plated area, and dirty etching.

Inactive Publication Date: 2012-05-09
SHENNAN CIRCUITS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The main technical problem to be solved by the present invention is to provide a manufacturing process for a full-plate gold-plated plate, which can overcome the defects of gold-plated permeation, unclean etching, poor quality of gold-plated and collapse of gold-plated areas

Method used

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  • Process for manufacturing whole gold-plated board
  • Process for manufacturing whole gold-plated board
  • Process for manufacturing whole gold-plated board

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Embodiment Construction

[0028] In order to describe the technical content, structural features, achieved goals and effects of the present invention in detail, the following will be described in detail in conjunction with the embodiments and accompanying drawings.

[0029] see Figure 1 to Figure 5 , the manufacturing process of full plate gold-plated plate of the present invention, comprises the following steps:

[0030] a. make all in-board graphics and conductive auxiliary edges 12 with gold-plated regions 10 and auxiliary gold-plated regions 11 on the circuit board at one time, the conductive auxiliary edges 12 are not connected with the in-board graphics, and the auxiliary gold-plated regions 11 is connected to the gold-plated area 10;

[0031] b. On the auxiliary gold-plated area 11, hot-press the gold-plated wire 13, so that the gold-plated wire 13 is connected with the auxiliary gold-plated area 11; The conductive auxiliary sides 12 are connected;

[0032] c. Utilize the conductive wire 13 ...

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Abstract

The invention discloses a process for manufacturing a whole gold-plated board. The process comprises the following steps: a. making all the patterns in the board and a conductive auxiliary frame on the circuit board once; b. hot-pressing leads for gold plating on auxiliary gold-plated areas so that the leads for gold plating are connected with the auxiliary gold-plated areas; c. adopting the leads for gold plating for conduction to plate gold on gold-plated areas on the circuit board; and d. removing the hot-pressed leads for gold plating and carrying out solder resist on the auxiliary gold-plated areas to ensure the auxiliary gold-plated areas to be solder resist non-conductive areas, wherein the patterns in the board are provided with the gold-plated areas and the auxiliary gold-plated areas; the conductive auxiliary frame is not connected with the patterns in the board; the auxiliary gold-plated areas are connected with the gold-plated areas; and the gold-plated areas are connectedwith the conductive auxiliary frame via the leads for gold plating connected on the auxiliary gold-plated areas. Through the process, the defects of seepage plating, incomplete etching, poor gold-plating quality and collapse of gold-pated areas in the prior art can be overcome.

Description

technical field [0001] The invention relates to a manufacturing process of a full-plate gold-plated plate. Background technique [0002] The existing full-board gold-plated board manufacturing process adopts the gold-plated process before graphics, and its technological process is as follows: blanking-inner layer processing-lamination-drilling-copper sinking-electroplating-outer layer graphics (use a large copper surface as a gold-plated wire , develop the gold-plated area for gold-plating)-full board gold-plating-external alkali etching (remove all dry film, etch non-gold-plated area)-external inspection-solder mask-character-surface coating-shape-electrical test-cheng inspection- Package. [0003] However, the pre-patterning process has the following drawbacks: [0004] a. It is easy to be gold-plated, permeated, and etched clean: use a large copper surface as a gold-plated wire, and use a dry film to cover the non-gold-plated area. Because there are certain problems in ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/18
Inventor 刘宝林王成勇武凤伍罗斌崔荣
Owner SHENNAN CIRCUITS