Data writing method, flash memory controller and flash memory system
A data writing and data technology, applied in the direction of memory address/allocation/relocation, etc., can solve the problem of taking a lot of time, and achieve the effect of shortening the time
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no. 1 example
[0059] Figure 1A It is a structural diagram of a host system using a flash storage device according to the first embodiment of the present invention. Figure 1B It is a schematic diagram of a computer, an input / output device and a flash storage device according to an embodiment of the present invention. Figure 1C It is a schematic diagram of a host system and a flash storage device according to another embodiment of the present invention.
[0060] Please refer to Figure 1A , the host system 1000 includes a computer 1100 and an input / output (input / output, referred to as: I / O) device 1106 . The computer 1100 includes a microprocessor 1102 , a random access memory (random access memory, RAM for short) 1104 , a system bus 1108 and a data transmission interface 1110 . The input / output device 1106 includes such as Figure 1B Mouse 1202, keyboard 1204, monitor 1206 and printer 1208 are shown. It is important to understand that Figure 1B The devices shown are not limited to th...
no. 2 example
[0125] The flash storage device and the host system of the second embodiment of the present invention are essentially the same as the flash storage device and the host system of the first embodiment, and the difference is that the memory management unit of the first embodiment is scattered according to the data of each logical block In the second embodiment, the memory management unit writes data into the flash chip according to the data randomness of each logical block and the data randomness of each physical block. The following will combine the first embodiment Figure 1A , Figure 1D , Figure 3A and Figure 3B The second embodiment will be described. In the second embodiment, the memory management unit 204 is also similar to Figure 4A , Figure 4B , Figure 5A , Figure 5B , Figure 6A and Figure 6B The shown approach manages flash memory chips 106 on a page basis.
[0126]In this embodiment, when the memory management unit 204 uses the page-based flash memory ...
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