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Oscilloscope with high-speed ADC (Analog-Digital Conversion) chips

An oscilloscope and chip technology, applied in instruments, digital variable/waveform display, measurement devices, etc., can solve the problems of difficult clock drive design, high cost, complex circuit, etc., to increase the drive capability and signal integrity, low cost, Solve circuit complex effects

Active Publication Date: 2011-05-18
RIGOL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0019] In view of this, the main purpose of the present invention is to provide an oscilloscope with a high-speed ADC chip, to solve the problems of complex circuits, high cost, and difficult clock drive design in the prior art, and to realize the data reset synchronization function of the high-speed ADC, and the circuit is simple , low cost, and low requirements on the driving of the sampling clock, the clock circuit design is simple

Method used

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  • Oscilloscope with high-speed ADC (Analog-Digital Conversion) chips
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  • Oscilloscope with high-speed ADC (Analog-Digital Conversion) chips

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Embodiment

[0077] 1. ADCs

[0078] like Figure 7 As shown, in this embodiment, the ADC uses National Semiconductor Corporation's ADC08D1010, which contains two ADC channels internally, with a sampling frequency of 1GHz, and the output data of each channel is demultiplexed into two sets of outputs, and the output synchronization can be selected in SDR and DDR modes. The 2-way output data share a data synchronization clock DCLK12, and the phase relationship of the two ADCs inside the chip is fixed and can be set by software.

[0079]If DDR and 2 sets of data output mode are selected, the output data synchronization clock is 1 / 4 of the sampling frequency, which is 250MHz.

[0080] This embodiment uses two pieces of ADC08D1010 to collect 4 analog signals.

[0081] The above-mentioned signals may be single-ended or differential.

[0082] 2. Sampling clock generation module

[0083] like Figure 8 As shown, in this embodiment, the sampling clock generation module adopts the PLL frequency...

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Abstract

The invention discloses an oscilloscope with high-speed ADC (Analog-Digital Conversion) chips, comprising two ADC chips, a sampling clock module and a control processing module, wherein a reset pulse enable control end of the control processing module is connected with data clock reset pins of the two ADC chips which input respective output data and respective data synchronous clocks to the control processing module respectively; and the control processing module is also provided with a sampling clock enable control end which is connected with the sampling clock module and is used for controlling clock output of the sampling clock module. The oscilloscope utilizes the clock enable and reset pulse to lead the synchronous time sequence of ADC to be realized easily and further realize high-speed ADC synchronization.

Description

technical field [0001] The invention relates to the technical field of high-speed ADC system clock synchronization, in particular to an oscilloscope with a high-speed analog-to-digital converter (ADC) chip. Background technique [0002] In digital oscilloscopes or other instruments and equipment, it is often necessary for multiple analog-to-digital converters (ADCs) to simultaneously sample a certain signal input for interleaved sampling to increase the sampling rate. Or if there are multiple signal inputs, multiple ADCs are required to sample multiple signals separately to ensure that the phases of signal sampling are consistent. [0003] The sampling frequency of digital oscilloscopes is getting higher and higher, and the sampling frequency of its internal ADC is also getting higher and higher, and digital oscilloscopes generally include multiple signal inputs, and the common ones are 2-channel input and 4-channel input. This requires multiple ADCs to sample the multiple ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R13/00
Inventor 王悦王铁军李维森
Owner RIGOL
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